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CD4027BNSR

Description
CMOS Dual J-K Master-Slave Flip-Flop 16-SO -55 to 125
Categorylogic    logic   
File Size2MB,28 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
Stay tuned Parametric

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CD4027BNSR Overview

CMOS Dual J-K Master-Slave Flip-Flop 16-SO -55 to 125

CD4027BNSR Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeSOIC
package instructionSOP-16
Contacts16
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time6 weeks
series4000/14000/40000
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length10.2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Sup3500000 Hz
MaximumI(ol)0.0015 A
Humidity sensitivity level1
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTR
Peak Reflow Temperature (Celsius)260
power supply5/15 V
Maximum supply current (ICC)0.06 mA
Prop。Delay @ Nom-Sup130 ns
propagation delay (tpd)300 ns
Certification statusNot Qualified
Schmitt triggerNo
Maximum seat height2 mm
Maximum supply voltage (Vsup)18 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width5.3 mm
minfmax12 MHz
Base Number Matches1
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