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PI74SSTVF16857A

Description
14-Bit Registered Buffer
Categorylogic    logic   
File Size182KB,8 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric Compare View All

PI74SSTVF16857A Overview

14-Bit Registered Buffer

PI74SSTVF16857A Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP48,.3,20
Contacts48
Reach Compliance Codecompli
ECCN codeEAR99
seriesSSTV
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length12.5 mm
Logic integrated circuit typeD FLIP-FLOP
Number of digits14
Number of functions1
Number of terminals48
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP48,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5 V
propagation delay (tpd)2.2 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width6.1 mm
minfmax210 MHz
PI74SSTVF16857A
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
14-Bit Registered Buffer
Product Features
• Designed for low-voltage operation,
2.5V for PC1600 ~ PC2700; 2.6V for PC3200
• Supports SSTL_2 Class I output specifications
• SSTL_2 Input and Output Levels
• Designed for DDR Memory
• Flow-Through Architecture
• Packaging Options (Lead-free packages are available):
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 173 mil wide plastic TVSOP (K)
Product Description
Pericom Semiconductor’s PI74SSTVF16857A series of logic circuits
are produced using the Company’s advanced sub-micron CMOS
technology, achieving industry leading speed.
The 14-bit PI74SSTVF16857A universal bus driver is designed
for 2.5V to 2.6V V
DD
operation and SSTL_2 I/O Levels except for
the RESET input which is LVCMOS.
Data flow from D to Q is controlled by the differential clock , CLK,
CLK and RESET. Data is triggered on the positive edge of CLK.
CLK must be used to maintain noise margins.
RESET must be supported with LVCMOS levels as V
REF
may not
be stable during power-up. RESET is asynchronous and is intended
for power-up only and when low assures that all of the registers reset
to the Low State, Q outputs are low, and all input receivers, data and
clock, are switched off.
R
CLK
V
Logic Block Diagram
CLK
CLK
RESET
D1
V
REF
38
39
34
48
35
1
Q1
D
Pericom’s PI74SSTVF16857A is characterized for operation from
0° to 70°C.
Product Pin Configuration
TO 13 OTHER CHANNELS
Product Pin Description
Pin Name
RESET
CLK
CLK
D
Q
GND
V
DD
V
DDQ
V
REF
Description
Reset (Active Low)
Clock Input
Clock Input
Data Input
Data Output
Ground
Core Supply Voltage
Output Supply Voltage
Input Reference Voltage
Q1
Q2
GND
VDDQ
Q3
Q4
Q5
GND
VDDQ
Q6
Q7
VDDQ
GND
Q8
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
D1
D2
GND
VDD
D3
D4
D5
D6
D7
CLK
CLK
VDD
GND
VREF
RESET
D8
D9
D10
D11
D12
VDD
GND
D13
D14
48-Pin
39
A, K
38
11
37
36
35
34
33
32
31
30
29
28
27
26
25
Truth Table
(1)
Inputs
RESET
L
H
Η
H
CLK
X
L or H
CLK
X
L or H
D
X
H
L
X
Outputs
Q
L
H
L
Q o
( 2 )
Q9
VDDQ
GND
Q10
Q11
Q12
VDDQ
GND
Q13
Q14
Notes:
2. Output level before the
1. H = High Signal Level
indicated steady state
L = Low Signal Level
input conditions were
= Transition LOW-to-HIGH
established.
= Transition HIGH-to-LOW
X = Irrelevant
1
PS8687
05/27/03

PI74SSTVF16857A Related Products

PI74SSTVF16857A PI74SSTVF16857AA PI74SSTVF16857AK PI74SSTVF16857AAE PI74SSTVF16857AKE
Description 14-Bit Registered Buffer 14-Bit Registered Buffer 14-Bit Registered Buffer 14-Bit Registered Buffer 14-Bit Registered Buffer
Is it Rohs certified? incompatible incompatible incompatible conform to conform to
Maker Pericom Semiconductor Corporation (Diodes Incorporated) Pericom Semiconductor Corporation (Diodes Incorporated) Pericom Semiconductor Corporation (Diodes Incorporated) Pericom Semiconductor Corporation (Diodes Incorporated) Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code TSSOP TSSOP SOIC TSSOP SOIC
package instruction TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.25,16 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.25,16
Contacts 48 48 48 48 48
Reach Compliance Code compli compli compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
series SSTV SSTV SSTV SSTV SSTV
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
length 12.5 mm 12.5 mm 9.7 mm 12.5 mm 9.7 mm
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Number of digits 14 14 14 14 14
Number of functions 1 1 1 1 1
Number of terminals 48 48 48 48 48
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C
Output polarity TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP TSSOP
Encapsulate equivalent code TSSOP48,.3,20 TSSOP48,.3,20 TSSOP48,.25,16 TSSOP48,.3,20 TSSOP48,.25,16
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
propagation delay (tpd) 2.2 ns 1.8 ns 1.8 ns 1.8 ns 1.8 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.5 mm 0.4 mm 0.5 mm 0.4 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 6.1 mm 6.1 mm 4.4 mm 6.1 mm 4.4 mm
minfmax 210 MHz 210 MHz 210 MHz 210 MHz 210 MHz
JESD-609 code e0 e0 e0 e3 -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Matte Tin (Sn) -
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