C8051F52x-53x
8/4/2 kB ISP Flash MCU Family
Analog Peripherals
-
12-Bit ADC
•
•
•
•
•
•
•
•
-
Comparator
±1 LSB INL (C8051F52x/C8051F53x); no missing
codes
Programmable throughput up to 200 ksps
Up to 6/16 external inputs
Data dependent windowed interrupt generator
Built-in temperature sensor
Programmable hysteresis and response time
Configurable as wake-up or reset source
Low current
Memory
-
8/4/2 kB Flash; In-system byte programmable in
-
Digital Peripherals
-
16/6 port I/O; push-pull or open-drain, 5 V tolerant
-
Hardware SPI™, and UART serial port
-
Hardware LIN (both master and slave, compatible
-
-
with V1.3 and V2.0)
Three general purpose 16-bit counter/timers
Programmable 16-bit counter/timer array with three
capture/compare modules, WDT
512 byte sectors
256 bytes internal data RAM
-
POR/Brownout Detector
-
Voltage Reference—1.5 to 2.2 V (programmable)
On-Chip Debug
-
On-chip debug circuitry facilitates full-speed, non-
-
-
-
Supply Voltage 2.7 to 5.25 V
-
Built-in LDO regulator
High Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
instructions in 1 or 2 system clocks
Up to
25 MIPS
throughput with
25 MHz system clock
Expanded interrupt handler
intrusive in-system debug (No emulator required)
Provides breakpoints, single stepping
Inspect/modify memory and registers
Complete development kit
Clock Sources
-
Internal oscillators: 24.5 MHz
±0.5%
accuracy sup-
-
ports UART and LIN-Master operation
External oscillator: Crystal, RC, C, or Clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly
-
Packages:
-
10-Pin QFN (3 x 3 mm)
-
20-pin QFN (4 x 4 mm)
-
20-pin TSSOP
Temperature Range: –40 to +125 °C
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SPI
PCA
Timer 0
Timer 1
Timer 2
Port 0
CROSSBAR
Port 1
LIN
12-bit
200 ksps
ADC
+
-
VOLTAGE
COMPARATOR
TEMP
SENSOR
VREF
VREG
24.5 MHz High Precision (±0.5%) Internal Oscillator
HIGH-SPEED CONTROLLER CORE
8/4/2 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
256 B SRAM
POR
WDT
Rev. 0.3 5/07
Copyright © 2007 by Silicon Laboratories
C8051F52x-53x
C8051F52x-53x
N
OTES
:
2
Rev. 0.3
C8051F52x-53x
Table of Contents
1. System Overview.................................................................................................... 17
1.1. CIP-51™ Microcontroller................................................................................... 21
1.1.1. Fully 8051 Compatible Instruction Set...................................................... 21
1.1.2. Improved Throughput ............................................................................... 21
1.1.3. Additional Features .................................................................................. 21
1.1.4. On-Chip Debug Circuitry .......................................................................... 21
1.2. On-Chip Memory............................................................................................... 22
1.3. Operating Modes .............................................................................................. 24
1.4. 12-Bit Analog to Digital Converter..................................................................... 25
1.5. Programmable Comparator .............................................................................. 26
1.6. Voltage Regulator ............................................................................................. 26
1.7. Serial Port ......................................................................................................... 26
1.8. Port Input/Output............................................................................................... 27
2. Absolute Maximum Ratings .................................................................................. 29
3. Global DC Electrical Characteristics .................................................................... 30
4. Pinout and Package Definitions............................................................................ 31
5. 12-Bit ADC (ADC0).................................................................................................. 41
5.1. Analog Multiplexer ............................................................................................ 41
5.2. Temperature Sensor ......................................................................................... 42
5.3. ADC0 Operation................................................................................................ 42
5.3.1. Starting a Conversion............................................................................... 43
5.3.2. Tracking Modes........................................................................................ 43
5.3.3. Timing....................................................................................................... 44
5.3.4. Burst Mode ............................................................................................... 46
5.3.5. Output Conversion Code.......................................................................... 47
5.3.6. Settling Time Requirements ..................................................................... 48
5.4. Programmable Window Detector ...................................................................... 53
5.4.1. Window Detector In Single-Ended Mode ................................................. 56
5.5. Selectable Attenuation ...................................................................................... 57
5.6. Typical ADC Parameters and Description ........................................................ 57
5.6.1. Resolution ................................................................................................ 57
5.6.2. Integral Non-Linearity (INL) ...................................................................... 57
5.6.3. Differential Non-Linearity (DNL) ............................................................... 57
5.6.4. Offset ....................................................................................................... 58
5.6.5. Full-Scale ................................................................................................. 58
5.6.6. Signal to Noise Plus Distortion ................................................................. 58
5.6.7. Total Harmonic Distortion (THD) .............................................................. 59
5.6.8. Spurious Free Dynamic Range (SFDR) ................................................... 59
6. Voltage Reference .................................................................................................. 63
7. Voltage Regulator (REG0)...................................................................................... 67
8. Comparator ........................................................................................................... 69
9. CIP-51 Microcontroller ........................................................................................... 75
9.1. Instruction Set ................................................................................................... 76
Rev. 0.3
3
C8051F52x-53x
9.1.1. Instruction and CPU Timing ..................................................................... 76
9.1.2. MOVX Instruction and Program Memory ................................................. 77
9.2. Register Descriptions........................................................................................ 80
9.3. Power Management Modes .............................................................................. 83
9.3.1. Idle Mode.................................................................................................. 84
9.3.2. Stop Mode ................................................................................................ 84
10. Memory Organization and SFRs ........................................................................... 85
10.1.Program Memory.............................................................................................. 85
10.2.Data Memory .................................................................................................... 86
10.3.General Purpose Registers .............................................................................. 86
10.4.Bit Addressable Locations ................................................................................ 86
10.5.Stack................................................................................................................. 86
10.6.Special Function Registers............................................................................... 87
11. Interrupt Handler .................................................................................................... 91
11.1.MCU Interrupt Sources and Vectors................................................................. 91
11.2.Interrupt Priorities ............................................................................................. 91
11.3.Interrupt Latency............................................................................................... 91
11.4.Interrupt Register Descriptions ......................................................................... 93
11.5.External Interrupts ............................................................................................ 97
12. Reset Sources......................................................................................................... 99
12.1.Power-On Reset ............................................................................................. 100
12.2.Power-Fail Reset / VDD Monitor .................................................................... 101
12.3.External Reset ................................................................................................ 102
12.4.Missing Clock Detector Reset ........................................................................ 102
12.5.Comparator Reset .......................................................................................... 102
12.6.PCA Watchdog Timer Reset .......................................................................... 103
12.7.Flash Error Reset ........................................................................................... 103
12.8.Software Reset ............................................................................................... 103
13. Flash Memory ....................................................................................................... 107
13.1.Programming The Flash Memory ................................................................... 107
13.1.1.Flash Lock and Key Functions ............................................................... 107
13.1.2.Flash Erase Procedure .......................................................................... 108
13.1.3.Flash Write Procedure ........................................................................... 108
13.2.Flash Write and Erase Guidelines .................................................................. 109
13.2.1.V
DD
Maintenance and the V
DD
monitor ................................................. 110
13.2.2.PSWE Maintenance ............................................................................... 111
13.2.3.System Clock ......................................................................................... 111
13.3.Non-volatile Data Storage .............................................................................. 112
13.4.Security Options ............................................................................................. 112
14. Port Input/Output.................................................................................................. 117
14.1.Priority Crossbar Decoder .............................................................................. 119
14.2.Port I/O Initialization ....................................................................................... 123
14.3.General Purpose Port I/O ............................................................................... 125
15. Oscillators ............................................................................................................. 133
15.1.Programmable Internal Oscillator ................................................................... 133
4
Rev. 0.3
C8051F52x-53x
15.1.1.Internal Oscillator Suspend Mode .......................................................... 134
15.2.External Oscillator Drive Circuit...................................................................... 137
15.2.1.Clocking Timers Directly Through the External Oscillator...................... 137
15.2.2.External Crystal Example....................................................................... 137
15.2.3.External RC Example............................................................................. 139
15.2.4.External Capacitor Example................................................................... 139
15.3.System Clock Selection.................................................................................. 141
16. UART0.................................................................................................................... 143
16.1.Enhanced Baud Rate Generation................................................................... 144
16.2.Operational Modes ......................................................................................... 145
16.2.1.8-Bit UART ............................................................................................. 145
16.2.2.9-Bit UART ............................................................................................. 146
16.3.Multiprocessor Communications .................................................................... 146
17. LIN (C8051F520/523/526/530/533/536 only) ........................................................ 151
17.1.Major Characteristics...................................................................................... 151
17.2. Software Interface with the LIN Peripheral .................................................. 152
17.3.LIN Registers.................................................................................................. 153
17.3.1.LIN Direct Access SFR Registers Definition .......................................... 153
17.3.2.LIN Indirect Access SFR Registers Definition........................................ 154
17.4.LIN Interface Setup and Operation................................................................. 161
17.4.1.Mode Definition ...................................................................................... 161
17.4.2.Bit Rate Options: Manual or Autobaud (Slave only)............................... 162
17.4.3.Baud Rate Calculations - Manual Mode................................................. 162
17.4.4.Baud Rate Calculations - Automatic Mode ............................................ 164
17.4.5.LIN Master Mode Operation................................................................... 165
17.4.6.LIN Slave Mode Operation..................................................................... 166
17.4.7.Sleep Mode and Wake-Up ..................................................................... 167
17.4.8.Error Detection and Handling................................................................. 168
17.4.9.LIN Master Mode Operation................................................................... 168
17.4.10.LIN Slave Mode Operation................................................................... 168
18. Enhanced Serial Peripheral Interface (SPI0)...................................................... 171
18.1.Signal Descriptions......................................................................................... 172
18.1.1.Master Out, Slave In (MOSI).................................................................. 172
18.1.2.Master In, Slave Out (MISO).................................................................. 172
18.1.3.Serial Clock (SCK) ................................................................................. 172
18.1.4.Slave Select (NSS) ................................................................................ 172
18.2.SPI0 Master Mode Operation ......................................................................... 173
18.3.SPI0 Slave Mode Operation ........................................................................... 174
18.4.SPI0 Interrupt Sources ................................................................................... 175
18.5.Serial Clock Timing......................................................................................... 175
18.6.SPI Special Function Registers ...................................................................... 176
19. Timers.................................................................................................................... 185
19.1.Timer 0 and Timer 1 ....................................................................................... 185
Rev. 0.3
5
京公网安备 11010802033920号
EEWORLD
