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TC74VCX16721FT(SPL

Description
TC74VCX16721FT(SPL
Categorylogic   
File Size246KB,12 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric View All

TC74VCX16721FT(SPL Overview

TC74VCX16721FT(SPL

TC74VCX16721FT(SPL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerToshiba Semiconductor
package instructionTSSOP, TSSOP56,.3,20
Reach Compliance Codeunknown
JESD-30 codeR-PDSO-G56
Load capacitance (CL)30 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Sup250000000 Hz
MaximumI(ol)0.024 A
Number of functions20
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP56,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply3.3 V
Prop。Delay @ Nom-Sup3.5 ns
Certification statusNot Qualified
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
Base Number Matches1
TC74VCX16721FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VCX16721FT
Low-Voltage 20-Bit D-Type Flip-Flop with 3.6-V Tolerant Inputs and Outputs
The TC74VCX16721FT is a high-performance CMOS 20-bit
D-type flip-flop. Designed for use in 1.8-V, 2.5-V or 3.3-V systems,
it achieves high-speed operation while maintaining the CMOS
low power dissipation.
It is also designed with overvoltage tolerant inputs and outputs
up to 3.6 V.
The TC74VCX16721FT is edge-triggered D-type flip-flop with
qualified clock storage. On the positive transition of the clock
(CK) input, the device provides true data at the Q outputs if the
clock-enable (CKEN) input is low. If CKEN is high, no data is
Weight: 0.25 g (typ.)
stored. When the OE input is high, the outputs are in a
high-impedance state. This device is designed to be used with
3-state memory address drivers, etc.
All inputs are equipped with protection circuits against static discharge.
Features
Low-voltage operation: V
CC
= 1.8 to 3.6 V
High-speed operation: t
pd
= 3.5 ns (max) (V
CC
= 3.0 to 3.6 V)
: t
pd
= 4.4 ns (max) (V
CC
= 2.3 to 2.7 V)
: t
pd
= 8.8 ns (max) (V
CC
= 1.8 V)
Output current : I
OH
/I
OL
= ±24 mA (min) (V
CC
= 3.0 V)
: I
OH
/I
OL
= ±18 mA (min) (V
CC
= 2.3 V)
: I
OH
/I
OL
= ±6 mA (min) (V
CC
= 1.8 V)
Latch-up performance:
−300
mA
ESD performance: Machine model
≥ ±200
V
Human body model
≥ ±2000
V
Package: TSSOP
3.6-V tolerant function and power-down protection provided on all inputs and outputs
Start of commercial production
1997-11
1
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