IS61LV12816LL datasheet, PDF - EEWORLD Datasheet

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IS61LV12816LL: Description128K X 16 STANDARD SRAM, 10 ns, PDSO44; Categorystorage; File Size102KB，16 Pages; ManufacturerISSI(Integrated Silicon Solution Inc.); Websitehttp://www.issi.com/

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IS61LV12816LL Overview

128K X 16 STANDARD SRAM, 10 ns, PDSO44

IS61LV12816LL Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	44
Maximum operating temperature	70 Cel
Minimum operating temperature	0.0 Cel
Maximum supply/operating voltage	3.63 V
Minimum supply/operating voltage	2.97 V
Rated supply voltage	3.3 V
maximum access time	10 ns
Processing package description	PLASTIC, TSOP2-44
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE, THIN PROFILE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.8000 mm
terminal coating	TIN LEAD
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	COMMERCIAL
memory width	16
organize	128K X 16
storage density	2.10E6 deg
operating mode	ASYNCHRONOUS
Number of digits	131072 words
Number of digits	128K
Memory IC type	STANDARD SRAM
serial parallel	PARALLEL

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IS61LV12816L

IS61LV12816LL

128K x 16 HIGH-SPEED CMOS STATIC RAM

WITH 3.3V SUPPLY

FEATURES

• High-speed access time:

IS61LV12816L: 8, 10 ns

IS61LV12816LL: 12 ns

• Operating Current:

IS61LV12816L: 50mA (typ.)

IS61LV12816LL: 30mA (typ.)

• Stand by Current:

IS61LV12816L: 700µA (typ.)

IS61LV12816LL: 400µA(typ.)

• TTL and CMOS compatible interface levels

• Single 3.3V power supply

• Fully static operation: no clock or refresh

required

• Three state outputs

• Data control for upper and lower bytes

• Industrial temperature available

ISSI

JUNE 2003

DESCRIPTION

The

ISSI

IS61LV12816L/IS61LV12816LL is a high-speed,

2,097,152-bit static RAM organized as 131,072 words by

16 bits. It is fabricated using

ISSI

's high-performance

CMOS technology. This highly reliable process coupled

with innovative circuit design techniques, yields access

times as fast as 8 ns with low power consumption.

When

is HIGH (deselected), the device assumes a

standby mode at which the power dissipation can be

reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable

and Output Enable inputs,

and

OE.

The active LOW

Write Enable (WE) controls both writing and reading of the

memory. A data byte allows Upper Byte (UB) and Lower

Byte (LB) access.

The IS61LV12816L/IS61LV12816LL is packaged in the

JEDEC standard 44-pin TSOP (Type II), 44-pin LQFP, and

48-pin mini BGA (6mm x 8mm).

FUNCTIONAL BLOCK DIAGRAM

A0-A16

DECODER

128Kx16

MEMORY ARRAY

VDD

GND

I/O0-I/O7

Lower Byte

I/O8-I/O15

Upper Byte

I/O

DATA

CIRCUIT

COLUMN I/O

CONTROL

CIRCUIT

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com —

1-800-379-4774

Rev. B

05/28/03

IS61LV12816LL Related Products

	IS61LV12816LL	IS61LV12816L	IS61LV12816L-8B	IS61LV12816L-8LQ	IS61LV12816L-10LQ	IS61LV12816L-8LQI	IS61LV12816LL-12BI	IS61LV12816LL-12LQI	IS61LV12816LL-12TI	IS61LV12816LL-12T
Description	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44	128K X 16 STANDARD SRAM, 10 ns, PDSO44
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	44	44	44	44	44	44	44	44	44	44
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel
Minimum operating temperature	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel
Maximum supply/operating voltage	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V	3.63 V
Minimum supply/operating voltage	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V	2.97 V
Rated supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
maximum access time	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns
Processing package description	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44	PLASTIC, TSOP2-44
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
packaging shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package Size	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
surface mount	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal spacing	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm
terminal coating	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
memory width	16	16	16	16	16	16	16	16	16	16
organize	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16	128K X 16
storage density	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg	2.10E6 deg
operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Memory IC type	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM
serial parallel	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Number of digits	128K	128K	128K	128K	128K	128K	128K	128K	128K	128K

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