GS8342TT19BGD-300I datasheet, PDF

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GS8342TT19BGD-300I: DescriptionSRAM 1.8 or 1.5V 2M x 18 36M; Categorystorage storage; File Size380KB，30 Pages; ManufacturerGSI Technology; Websitehttp://www.gsitechnology.com/; Environmental Compliance

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GS8342TT19BGD-300I Overview

SRAM 1.8 or 1.5V 2M x 18 36M

GS8342TT19BGD-300I Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	GSI Technology
Parts packaging code	BGA
package instruction	LBGA, BGA165,11X15,40
Contacts	165
Reach Compliance Code	compliant
ECCN code	3A991.B.2.B
Factory Lead Time	10 weeks
Maximum access time	0.45 ns
Other features	PIPELINED ARCHITECTURE, LATE WRITE
Maximum clock frequency (fCLK)	300 MHz
I/O type	COMMON
JESD-30 code	R-PBGA-B165
length	15 mm
memory density	37748736 bit
Memory IC Type	DDR SRAM
memory width	18
Number of functions	1
Number of terminals	165
word count	2097152 words
character code	2000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	2MX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LBGA
Encapsulate equivalent code	BGA165,11X15,40
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.5/1.8,1.8 V
Certification status	Not Qualified
Maximum seat height	1.4 mm
Minimum standby current	1.7 V
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	13 mm

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GS8342TT07/10/19/37BD-450/400/350/333/300

165-Bump BGA

Commercial Temp

Industrial Temp

Features

• 2.0 Clock Latency

• Simultaneous Read and Write SigmaDDR™ Interface

• Common I/O bus

• JEDEC-standard pinout and package

• Double Data Rate interface

• Byte Write controls sampled at data-in time

• Burst of 2 Read and Write

• Dual-Range On-Die Termination (ODT) on Data (D), Byte

Write (BW), and Clock (K, K) inputs

• 1.8 V +100/–100 mV core power supply

• 1.5 V or 1.8 V HSTL Interface

• Pipelined read operation with self-timed Late Write

• Fully coherent read and write pipelines

• ZQ pin for programmable output drive strength

• Data Valid pin (QVLD) Support

• IEEE 1149.1 JTAG-compliant Boundary Scan

• 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package

• RoHS-compliant 165-bump BGA package available

36Mb SigmaDDR-II+

Burst of 2 SRAM

450 MHz–300 MHz

1.8 V V

1.8 V or 1.5 V I/O

Bottom View

165-Bump, 13 mm x 15 mm BGA

1 mm Bump Pitch, 11 x 15 Bump Array

SigmaDDR™ Family Overview

The GS8342TT07/10/19/37BD are built in compliance with

the SigmaDDR-II+ SRAM pinout standard for Common I/O

synchronous SRAMs. They are 37,748,736 (36Mb) SRAMs.

The GS8342TT07/10/19/37BD SigmaDDR-II+ SRAMs are

just one element in a family of low power, low voltage HSTL

I/O SRAMs designed to operate at the speeds needed to

implement economical high performance networking systems.

Clocking and Addressing Schemes

The GS8342TT07/10/19/37BD SigmaDDR-II+ SRAMs are

synchronous devices. They employ two input register clock

inputs, K and K. K and K are independent single-ended clock

inputs, not differential inputs to a single differential clock input

buffer.

Because Common I/O SigmaDDR-II+

RAMs

always transfer

data in two packets, A0 is internally set to 0 for the first read

or write transfer, and automatically incremented by 1 for the

next transfer. Because the LSB is tied off internally, the

address field of a SigmaDDR-II+ B2

RAM

is always one

address pin less than the advertised index depth force return

(e.g., the 2M x 18 has a 1M addressable index).

Parameter Synopsis

-450

tKHKH

tKHQV

2.22 ns

0.45 ns

-400

2.5 ns

0.45 ns

-350

2.86 ns

0.45 ns

-333

3.0 ns

0.45 ns

-300

3.3 ns

0.45 ns

Rev: 1.01a 8/2017

1/30

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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