Preliminary
PLL600-27F
Low Power 5 Output XO 10MHz to 52MHz
FEATURES
•
•
•
•
•
•
•
Generates 5 CMOS outputs.
10 to 52MHz fundamental or 3
rd
OT crystal input.
Low phase noise (-130 dBc @ 10kHz offset).
Low jitter (RMS): 2.5ps period jitter.
12mA drive capability at TTL output.
1.62V to 3.63V DC operation.
Available in 14 pin 150mil SOIC.
PIN ASSIGNMENT
XIN/FIN
GND
CLK1
GND
1
2
14
13
XOUT
GND
CLK5
VDD
CLK4
VDD
CLK3
PLL600-27F
3
4
5
6
7
12
11
10
9
8
DESCRIPTION
The PLL600-27F is part of PhaseLink’s low cost
family of XO IC’s, designed to replace multiple XO
solutions saving the cost and board space of clock
distribution buffers. In addition, it provides among
the lowest current on the market for the 10MHz to
52MHz range. It accepts input crystals from 10 to
52MHz (fundamental resonant mode) and provides
low phase noise (<-130dBc at 10kHz offset at
30MHz), and very low jitter (2.5 ps RMS period jitter)
outputs.
CLK2
GND
N/C
BLOCK DIAGRAM
XIN/FIN
XOUT
XTAL
OSC
CLK1
CLK2
CLK3
CLK4
CLK5
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 08/12/04 Page 1
Preliminary
PLL600-27F
Low Power 5 Output XO 10MHz to 52MHz
PIN DESCRIPTION
Name
XIN
GND
CLK1
CLK2
N/C
CLK3
VDD
CLK4
CLK5
XOUT
Pin #
1
2,4,6,13
3
5
7
8
9,11
10
12
14
Type
I
P
O
O
-
O
P
O
O
O
Description
Crystal Input or Reference Clock input ( 10MHz to 52MHz ).
Ground.
Buffered clock output.
Buffered clock output.
No connection.
Buffered clock output.
Power supply.
Buffered clock output.
Buffered clock output.
Crystal output.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Electrical Specifications
PARAMETERS
Input Crystal Frequency
Settling time
Output Clock Rise/Fall Time
VDD sensitivity
Output Clock Duty Cycle
Short Circuit Current
At power-up
(Vdd reaches 1.62V)
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
Frequency vs. VDD +/- 10%
Measured @ 1.4V
CONDITIONS
MIN.
10
TYP.
MAX.
52
10
UNITS
MHz
ms
ns
1.15
2.4
0.8
45
50
±50
0.8
55
ppm
%
mA
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 08/12/04 Page 2
Preliminary
PLL600-27F
Low Power 5 Output XO 10MHz to 52MHz
3. Jitter and Phase Noise Specifications
PARAMETERS
RMS Period Jitter
(1 sigma – 1000 samples)
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
CONDITIONS
With capacitive decoupling
between VDD and GND.
30MHz @100Hz offset
30MHz @1kHz offset
30MHz @10kHz offset
30MHz @100kHz offset
30MHz @1MHz offset
MIN.
TYP.
2.1
-80
-110
-130
-138
-145
MAX.
2.5
UNITS
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
4. DC Specifications
PARAMETERS
Supply Current, Dynamic,
with Loaded Outputs
@ 3.3V
Supply Current in tri-state
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage at
CMOS level
Output drive current
SYMBOL
I
DD
I
DD
V
DD
V
OH
V
OL
V
OHC
CONDITIONS
At 27MHz, Cload=10pF (3.3V)
Output disabled
I
OH
= -12mA (3.3V)
I
OL
= 12mA (3.3V)
I
OH
= -4mA (3.3V)
At TTL level (3.3V)
MIN.
TYP.
6.0
MAX.
UNITS
mA
1.62
2.4
V
DD
– 0.4
12
17
520
3.63
0.4
µA
V
V
V
V
mA
5. Crystal Specification
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Maximum Sustainable Drive Level
Operating Drive Level
C0 (for frequencies below 30MHz)
C0 (for frequencies above 30MHz)
ESR
SYMBOL
F
XIN
C
L (xtal)
MIN.
10
TYP.
8.5
MAX.
52
200
UNITS
MHz
pF
µW
µW
pF
pF
Ω
50
5
4
30
R
S
Note:
A detailed crystal specification document is also available for this part
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 08/12/04 Page 3
Preliminary
PLL600-27F
Low Power 5 Output XO 10MHz to 52MHz
PACKAGE INFORMATION
14 PIN Narrow SOIC ( mm )
SOIC
Symbol
A
A1
B
C
D
E
H
L
e
Min.
1.35
0.10
0.33
0.19
9.80
3.80
5.80
0.40
1.27 BSC
Max.
1.75
0.25
0.51
0.25
10.00
4.00
6.20
1.27
A1
B
A
C
L
e
D
E
H
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL600-27F
PART NUMBER
SC
TEMPERATURE
C=COMMERCIAL
I=INDUSTRIAL
PACKAGE TYPE
S=SOIC
Order Number
PLL600-27F SC
PLL600-27F SC-R
Marking
P600-27F SC
P600-27F SC
Package Option
SOIC - Tube
SOIC - Tape and Reel
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by PhaseLink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 08/12/04 Page 4
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