EEWORLDEEWORLDEEWORLD

Part Number

Search

532EC000312DGR

Description
Standard Clock Oscillators Dual Frequency XO, OE Pin 2
CategoryPassive components   
File Size338KB,12 Pages
ManufacturerSilicon Laboratories
Download Datasheet Parametric View All

532EC000312DGR Online Shopping

Suppliers Part Number Price MOQ In stock  
532EC000312DGR - - View Buy Now

532EC000312DGR Overview

Standard Clock Oscillators Dual Frequency XO, OE Pin 2

532EC000312DGR Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerSilicon Laboratories
Product CategoryStandard Clock Oscillators
PackagingBox
Si532
R
EVISION
D
D
U A L
F
REQUENCY
C
R Y S TA L
O
SCILLATOR
(XO )
(10 M H
Z TO
1.4 G H
Z
)
Features
Available with any-frequency output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
Two selectable output frequencies
rd
®
3 generation DSPLL with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
Description
The Si532 dual frequency XO utilizes Silicon Laboratories’ advanced
DSPLL
®
circuitry to provide a low jitter clock at high frequencies. The Si532 is
available with any-frequency output frequency from 10 to 945 MHz and select
frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is
required for each output frequency, the Si532 uses one fixed crystal
frequency to provide a wide range of output frequencies. This IC based
approach allows the crystal resonator to provide exceptional frequency
stability and reliability. In addition, DSPLL clock synthesis provides superior
supply noise rejection, simplifying the task of generating low jitter clocks in
noisy environments typically found in communication systems. The Si532 IC
based XO is factory configurable for a wide variety of user specifications
including frequency, supply voltage, output format, and temperature stability.
Specific configurations are factory programmed at time of shipment, thereby
eliminating long lead times associated with custom oscillators.
FS
1
6
V
DD
OE
2
5
CLK–
GND
3
4
CLK+
(LVDS/LVPECL/CML)
FS
1
6
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
OE
2
5
NC
GND
3
4
CLK
(CMOS)
Fixed
Frequency
XO
Any-frequency
10–1400 MHz
DSPLL
®
Clock
Synthesis
FS
OE
GND
Rev. 1.31 4/16
Copyright © 2016 by Silicon Laboratories
Si532
About data structures or classic algorithms in microcontrollers
I accidentally read a post that mentioned high-quality and efficient programs. I have always understood this principle, but it is difficult to move forward without reading other people's excellent cod...
fpgafuns Embedded System
VB MSCOMM and PLC communication
VB's MSCOMM control is very convenient for serial port communication and can also be introduced in DELPHI. As long as you select MicroSoft COMM Control in the components of the VB design environment, ...
totopper Industrial Control Electronics
Creative elevator health reminder screen [Ladies who love beauty should pay more attention]]
Creative elevator health reminder screen, exercise is good for physical and mental healthThis very creative health reminder sign is suitable for installation beside the elevator. There is a camera on ...
xyh_521 Creative Market
Is it a problem with the pull-up resistor settings?
Two atmage16s realize SPI communication and the corresponding ports are connected. Data misalignment occurs during data transmission (proteus simulation). Repeated combination tests in several modes c...
turbogears Microchip MCU
What's wrong with this frequency divider module?
Hello seniors, I used ISE software to write a frequency division module, but the result is like this, where is the error?...
saf806 FPGA/CPLD
Inverted Pendulum Final Version
[i=s]This post was last edited by paulhyde on 2014-9-15 03:16[/i] Four days and three nights, nosebleeds and tears, and now I have to write a paper, it's not easy[url]http://v.youku.com/v_show/id_XNjA...
hanying0313 Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1907  2842  66  491  1378  39  58  2  10  28 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号