PLL502-50
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
FEATURES
•
•
•
•
•
•
•
Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 380ppm minimum).
Selectable frequency dividers (x1, 1/2, 1/4, 1/8)
available as bonding options.
VCXO tuning range: 0.3V - 3.0V.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 20 to 52MHz).
2.5V or 3.3V supply voltage.
Selectable High Drive (30mA) or Standard Drive
(10mA) CMOS output.
Available in DIE (65 mil x 62 mil).
DIE CONFIGURATION
65 mil
VDD
VDD
OE^
S1
V
S0
V
S2
V
18
(1550,1475)
25
23
21
20
19
XIN
27
Die ID:
A0303-03J
62 mil
13
CLK
XOUT
29
C502A
VCON
31
7
10
GND
Y
X
(0,0)
The PLL502-50 is a monolithic low jitter, high
performance CMOS VCXO IC Die. It allows the
control of the output frequency with an input voltage
(VCON), using a low cost crystal.
The same die can be used as a VCXO with output
frequencies ranging from F
XIN
x 1 to F
XIN
/ 8 thanks
to selector pads allowing bonding options (see
Divider Selection Table on this page). This makes
the PLL502-50 ideal for a wide range of applications
from 2.5MHz to 52MHz (including 27MHz,
35.328MHz, etc.).
Note:
^ denotes internal pull up
V
denotes internal pull down
DIVIDER SELECTION
SELECTION
S2
S1
S0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
F
XIN
CLK (MHz)
F
XIN
x 1
F
XIN
÷
2
F
XIN
÷
4
F
XIN
x 1*
F
XIN
÷
8
F
XIN
÷
4*
F
XIN
÷
2*
F
XIN
÷
8*
20MHz – 52MHz
BLOCK DIAGRAM
Note:
Selector pads default to ‘0’, wire bond to VDD to set to ‘1’
(*) High-drive CMOS output
XIN
VCXO
Selectable
Divider
CLK
PAD DESCRIPTIONS
Name
Number
Description
VCON
DIE SPECIFICATIONS
Name
Value
Size
Reverse side
Pad dimensions
Thickness
62 x 65 mil
GND
80 micron x 80 micron
10 mil
XIN
XOUT
VCON
GND
CLK
S[0:2]
VDD
OE
27
29
31
7,10
13
18,19,20
21,22,23
25
Crystal input connection.
Crystal output connection.
Voltage Control input.
Ground.
Clock output.
Frequency selection pad
Power supply.
Output Enable: ‘0’ to disable
(tri-state output), 1’ (default
value when not connected) to
enabled the output.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/17/04 Page 1
GND
DESCRIPTION
PLL502-50
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. DC Electrical Specifications
PARAMETERS
Supply Current, Dynamic, with
Loaded Outputs
Operating Voltage
Output drive current
(High Drive)
Output drive current
(Standard Drive)
Short Circuit Current
VCXO Control Voltage
SYMBOL
I
DD
V
DD
I
OH
I
OL
I
OH
I
OL
VCON
CONDITIONS
F
XIN
= 20 - 52MHz
Output load of 10pF
V
OH
= V
DD
-0.4V, V
DD
=3.3V
V
OL
= 0.4V, V
DD
= 3.3V
V
OH
= V
DD
-0.4V, V
DD
=3.3V
V
OL
= 0.4V, V
DD
= 3.3V
MIN.
TYP.
10
MAX.
UNITS
mA
2.25
30
30
10
10
±50
0
3.63
V
DD
V
mA
mA
mA
mA
mA
V
3. AC Electrical Specifications
PARAMETERS
Input Crystal Frequency
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
Output Clock Duty Cycle
SYMBOL
CONDITIONS
0.3V ~ 3.0V with 15 pF load
0.3V ~ 3.0V with 15 pF load
Measured @ 50% V
DD
MIN.
20
TYP.
2.4
1.2
MAX.
52
UNITS
MHz
ns
45
50
55
%
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/17/04 Page 2
PLL502-50
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
4. Voltage Control Crystal Oscillator (3.3V)
PARAMETERS
VCXO Stabilization Time *
VCXO Tuning Range
CLK output pullability
VCXO Tuning Characteristic
Pull range linearity
VCON input impedance
VCON modulation BW
SYMBOL
T
VCXOSTB
CONDITIONS
From power valid
F
XIN
= 20 - 52MHz;
XTAL C
0
/C
1
< 250
0V
≤
VCON
≤
3.3V
VCON=1.65V
±1.65V
MIN.
TYP.
MAX.
10
UNITS
ms
ppm
ppm
ppm/V
%
kΩ
kHz
500
±200
150
10
80
0V
≤
VCON
≤
3.3V, -3dB
25
Note:
Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
5. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Crystal Pullability
Recommended ESR
SYMBOL
F
XIN
C
L (xtal)
C
0
/C
1 (xtal)
R
E
CONDITIONS
Parallel Fundamental Mode
At Vcon = 1.65V
AT cut
AT cut
MIN.
20
TYP.
9.5
MAX.
52
250
30
UNITS
MHz
pF
-
Ω
Note:
Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at
nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This
however may reduce the pull range.
6. Jitter specifications
PARAMETERS
Period jitter RMS
Period jitter peak-to-peak
Integrated jitter RMS
CONDITIONS
51.84MHz
51.84MHz
Integrated 12 kHz to 20 MHz at 51.84MHz
MIN.
TYP.
2.3
18
1
MAX.
UNITS
ps
ps
ps
7. Phase noise specifications
PARAMETERS
Phase Noise relative
to carrier
Note: Phase Noise at VCON = 0V
FREQUENCY
51.85MHz
@10Hz
-65
@100Hz
-90
@1kHz
-120
@10kHz
-140
@100kHz
-147
UNITS
dBc/Hz
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/17/04 Page 3
PLL502-50
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
PAD COORDINATES
Pad #
7
10
13
18
19
20
21
23
25
27
29
31
Name
GND
GND
CLK
S2
S1
S0
VDD
VDD
OE
XIN
XOUT
VCON
X (µm)
1042
1400
1400
1232
1042
854
659
459
194
109
109
109
Y (µm)
109
259
716
1365
1365
1365
1365
1365
1365
1017
646
181
Ground.
Ground.
Clock Output.
Frequency Selector pad. Has internal pull down.
Frequency Selector pad. Has internal pull down.
Frequency Selector pad. Has internal pull down.
Power Supply.
Power Supply.
Used to Enable/Disable the output. Has internal pull up.
Crystal input pad. See Crystal Specifications on page 3.
Crystal output pad. See Crystal Specifications on page 3.
Voltage control input.
Description
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL502-50 D C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
D=DIE
Order Number
PLL502-50DC
Marking
P502-50DC
Package Option
Die (Waffle Pack)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems
without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/17/04 Page 4
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