3335-21 datasheet, PDF - EEWORLD Datasheet

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3335-21: Description3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications; CategoryAnalog mixed-signal IC The signal circuit; File Size232KB，15 Pages; ManufacturerpSemi (peregrine semiconductor); Websitehttp://www.psemi.com/

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3335-21 Overview

3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications

3335-21 Parametric

Parameter Name	Attribute value
Maker	pSemi (peregrine semiconductor)
Parts packaging code	LCC
package instruction	PLASTIC, LCC-44
Contacts	44
Reach Compliance Code	compliant
Analog Integrated Circuits - Other Types	PHASE LOCKED LOOP
JESD-30 code	S-PQCC-J44
length	16.5862 mm
Number of functions	1
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	4.572 mm
Maximum supply voltage (Vsup)	3.15 V
Minimum supply voltage (Vsup)	2.85 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	16.5862 mm

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Product Specification

PE3335

Product Description

Peregrine’s PE3335 is a high performance integer-N PLL

capable of frequency synthesis up to 3000 MHz. The

superior phase noise performance of the PE3335 makes it

ideal for applications such as LMDS / MMDS / WLL

basestations and demanding terrestrial systems.

The PE3335 features a 10/11 dual modulus prescaler,

counters, phase comparator and a charge pump as shown

in Figure 1. Counter values are programmable through

either a serial or parallel interface and can also be directly

hard wired.

The PE3335 Phase Locked-Loop is optimized for terrestrial

applications. It is manufactured on Peregrine’s

UltraCMOS™ process, a patented variation of silicon-on-

insulator (SOI) technology on a sapphire substrate, offering

the performance of GaAs with the economy and integration

of conventional CMOS.

3000 MHz UltraCMOS™ Integer-N PLL

for Low Phase Noise Applications

Features

•

3000 MHz operation

•

÷10/11 dual modulus prescaler

•

Internal phase detector with

charge pump

•

Serial, parallel or hardwired

programmable

•

Ultra-low phase noise

•

Available in 44-lead PLCC and

7x7 mm 48-lead QFN packages

Figure 1. Block Diagram

Prescaler

10/11

Main

Counter

D(7:0)

Sdata

Pre_en

M(6:0)

A(3:0)

R(3:0)

Primary

20-bit

Latch

Secon-

dary

20-bit

Latch

Phase

Detector

PD_U

PD_D

Charge

Pump

R Counter

Document No. 70-0049-02

│

www.psemi.com

Page 1 of 15

3335-21 Related Products

	3335-21	3335-23	PE3335	3335-00	3335-01	PE3335EK
Description	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications	3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Applications

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