ZSSC3015NA1B datasheet, PDF - EEWORLD Datasheet

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ZSSC3015NA1B: DescriptionIntegrated Device Technology Wafer (unsawn) - box; CategoryAnalog mixed-signal IC The signal circuit; File Size484KB，48 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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ZSSC3015NA1B Overview

Integrated Device Technology Wafer (unsawn) - box

ZSSC3015NA1B Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	WAFER
package instruction	,
Contacts	0
Manufacturer packaging code	DICE
Reach Compliance Code	compliant
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT
JESD-609 code	e3
Humidity sensitivity level	1
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Terminal surface	Tin (Sn)
Maximum time at peak reflow temperature	NOT SPECIFIED

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RBic

dLite-AutoTM

Sensor Signal

Conditioner with Diagnostics

ZSSC3015

Datasheet

Brief Description

The ZSSC3015 sensor signal conditioner IC is

adjustable to nearly all piezo-resistive bridge

sensors. Measured and corrected bridge values are

provided at the Sig™ pin, which can be configured

as an analog voltage output or as a one-wire serial

digital output.

The ZACwire™ digital one-wire interface (OWI) can

be used for a simple PC-controlled calibration

procedure to program a set of calibration coefficients

into an on-chip EEPROM. The calibrated ZSSC3015

and a specific sensor are mated digitally: fast,

precise, and without the cost overhead associated

with trimming by external devices or laser. Integrated

diagnostics functions make the ZSSC3015 parti-

cularly well suited for automotive applications.

Benefits

•

No external trimming components required

PC-controlled configuration and calibration via

ZACwire™ one-wire interface – simple, low cost

High accuracy (as high as ±0.1% FSO @ -25 to

85°C; ±0.25% FSO @ -50 to 150°C)

Single-pass calibration – quick and precise

Available Support

•

Evaluation Kit available

Mass Calibration System available

Support for industrial mass calibration available

Quick circuit customization possible for large

production volumes

Features

•

Physical Characteristics

•

Digital compensation of sensor offset, sensitivity,

temperature drift, and nonlinearity

Programmable analog gain and digital gain;

accommodates bridges with spans < 1mV/V

and high offset

Many diagnostic features on chip (e.g., EEPROM

signature, bridge connection checks, bridge short

detection, power loss detection)

Independently programmable high and low

clipping levels

24-bit customer ID field for module traceability

Internal temperature compensation reference (no

external components)

Option for external temperature compensation

with addition of single diode

Output options: rail-to-rail ratiometric analog

voltage (12-bit resolution), absolute analog

voltage, ZACwire™ digital one-wire interface

Fast power-up to data out response; output

available 5ms after power-up

Current consumption depends on programmed

sample rate and mode: 1mA down to 300µA (typ.)

Fast response time: 1.4ms typical

High voltage protection: ≤ 30V with external JFET

AEC-Q100 qualified

Wide operation temperature: –50°C to +150°C

Supply voltage 2.7 to 5.5V; with external JFET,

5.5 to 30V

Small SOP8 package

ZSSC3015 Application Circuit

supply

+2.7 to +5.5 V

VDD

Sig™

OUT/OWI

ZSSC3015

VBP

Vgate

VBN

VSS

0.1

Ground

January 20, 2016

ZSSC3015 Datasheet

Contents

List of Figures .......................................................................................................................................................... 4

List of Tables ........................................................................................................................................................... 5

1 Electrical Characteristics .................................................................................................................................. 6

1.1. Absolute Maximum Ratings ....................................................................................................................... 6

1.2. Recommended Operating Conditions ....................................................................................................... 6

1.3. Electrical Parameters ................................................................................................................................ 7

1.4. Analog Inputs versus Output Resolution ................................................................................................... 9

2 Circuit Description .......................................................................................................................................... 11

2.1. Signal Flow and Block Diagram............................................................................................................... 11

2.2. Analog Front End ..................................................................................................................................... 12

2.2.1. Bandgap/PTAT and PTAT Amplifier ................................................................................................. 12

2.2.2. Bridge Supply .................................................................................................................................... 12

2.2.3. PREAMP Block ................................................................................................................................. 12

2.2.4. Analog-to-Digital Converter (ADC).................................................................................................... 13

2.3. Digital Signal Processor .......................................................................................................................... 13

2.3.1. EEPROM ........................................................................................................................................... 14

2.3.2. One-Wire Interface – ZACwire™ ...................................................................................................... 15

2.4. Output Stage............................................................................................................................................ 15

2.4.1. Digital to Analog Converter (Output DAC) with Programmable Clipping Limits ............................... 15

2.4.2. Output Buffer and Output Short Circuit Protection ............................................................................ 16

2.4.3. Voltage Reference Block .................................................................................................................. 16

2.5. Clock Generator / Power-On Reset (CLKPOR) ...................................................................................... 17

2.6. Diagnostic Features ................................................................................................................................. 17

2.6.1. EEPROM Integrity ............................................................................................................................. 18

2.6.2. Sensor Connection Check ................................................................................................................ 18

2.6.3. Sensor Short Check .......................................................................................................................... 19

2.6.4. Power Loss Detection ....................................................................................................................... 19

2.6.5. ExtTemp Connection Checks ........................................................................................................... 19

3 Functional Description .................................................................................................................................... 20

3.1. General Working Mode ............................................................................................................................ 20

3.2. Normal Mode Sample Rate ..................................................................................................................... 22

3.3. ZACwire™ Communication Interface ...................................................................................................... 23

3.3.1. Properties and Parameters ............................................................................................................... 23

3.3.2. Bit Encoding ...................................................................................................................................... 23

3.3.3. Write Operation from Master to ZSSC3015 ...................................................................................... 24

3.3.4. ZSSC3015 Read Operations ............................................................................................................ 24

3.3.5. High Level Protocol ........................................................................................................................... 27

3.4. Command/Data Bytes Encoding ............................................................................................................. 28

3.5. Calibration Sequence .............................................................................................................................. 29

3.6. EEPROM Bits .......................................................................................................................................... 31

January 20, 2016

ZSSC3015 Datasheet

3.7. Calibration Math ...................................................................................................................................... 34

3.7.1. Correction Coefficients ...................................................................................................................... 34

3.7.2. Interpretation of Binary Numbers for Correction Coefficients ........................................................... 35

3.8. Reading EEPROM Contents ................................................................................................................... 38

4 Application Circuit Examples .......................................................................................................................... 39

4.1. Three-Wire Rail-to-Rail Ratiometric Output ............................................................................................. 39

4.2. Absolute Analog Voltage Output ............................................................................................................. 40

4.3. Three-Wire Ratiometric Output with Over-Voltage Protection ................................................................ 41

4.4. Digital Output ........................................................................................................................................... 41

4.5. Output Resistor/Capacitor Limits ............................................................................................................. 41

5 EEPROM Restoration .................................................................................................................................... 42

5.1. Default EEPROM Contents ..................................................................................................................... 42

5.1.1. 1V_Trim/JFET_Trim .......................................................................................................................... 42

5.2. EEPROM Restoration Procedure ............................................................................................................ 42

6 Pin Configuration and Package ...................................................................................................................... 44

7 ESD/Latch-Up-Protection ............................................................................................................................... 45

8 Test................................................................................................................................................................. 45

9 Quality and Reliability ..................................................................................................................................... 45

10 Customization ................................................................................................................................................. 45

11 Ordering Sales Codes .................................................................................................................................... 46

12 Related Documents ........................................................................................................................................ 46

13 Definitions of Acronyms .................................................................................................................................. 47

14 Document Revision History ............................................................................................................................ 48

List of Figures

Figure 2.1

Figure 2.2

Figure 3.1

Figure 3.2

Figure 3.3

Figure 3.4

Figure 3.5

Figure 3.6

Figure 3.7

Figure 3.8

Figure 3.9

Figure 4.1

Figure 4.2

Figure 4.3

Figure 5.1

ZSSC3015 Block Diagram ................................................................................................................ 11

DAC Output Timing for Highest Update Rate ................................................................................... 15

General Working Mode ..................................................................................................................... 21

Manchester Duty Cycle ..................................................................................................................... 23

19-Bit Write Frame ............................................................................................................................ 24

Read Acknowledge ........................................................................................................................... 24

Digital Output (NOM) Bridge Readings ............................................................................................ 25

Digital Output (NOM) Bridge Readings with Temperature ............................................................... 25

Read EEPROM Contents ................................................................................................................. 26

Transmission of a Number of Data Packets ..................................................................................... 26

ZACwire™ Output Timing for Lower Update Rates.......................................................................... 27

Rail-to-Rail Ratiometric Voltage Output – Temperature Compensation via External Diode ............ 39

Absolute Analog Voltage Output – Temperature Compensation via External Diode with External

JFET Regulation ............................................................................................................................... 40

Ratiometric Output, Temperature Compensation via Internal PTAT ................................................ 41

EEPROM Validation and Restoration Procedure ............................................................................. 43

January 20, 2016

ZSSC3015 Datasheet

Figure 6.1

ZSSC3015 Pin-Out Diagram ............................................................................................................ 44

List of Tables

Table 1.1

Table 1.2

Table 1.3

Table 1.4

Table 2.1

Table 2.2

Table 3.1

Table 3.2

Table 3.3

Table 3.4

Table 3.5

Table 3.6

Table 3.7

Table 3.8

Table 3.9

Table 3.10

Table 3.11

Table 3.12

Table 6.1

ADC Resolution Characteristics for an Analog Gain of 6 ................................................................... 9

ADC Resolution Characteristics for an Analog Gain of 24 ................................................................. 9

ADC Resolution Characteristics for an Analog Gain of 48 ............................................................... 10

ADC Resolution Characteristics for an Analog Gain of 96 ............................................................... 10

1V Reference Trim (1V vs. Trim for Nominal Process Run) ............................................................. 17

Summary of Diagnostic Features ..................................................................................................... 18

Update Rate for Analog Output ........................................................................................................ 22

ZACwire™ Parameters ..................................................................................................................... 23

Idle Time between Packets versus Update Rate.............................................................................. 26

Total Transmission Time for Different Update Rate and Output Configurations .............................. 27

Command/Data Bytes Encoding....................................................................................................... 28

ZSSC3015 EEPROM Bits ................................................................................................................. 31

Correction Coefficients ..................................................................................................................... 34

Gain_B [13:0] Weightings ................................................................................................................. 35

Offset_B Weightings ......................................................................................................................... 36

Gain_T Weightings ........................................................................................................................... 36

Offset_T Weightings ......................................................................................................................... 37

EEPROM Read Order ...................................................................................................................... 38

ZSSC3015 Pin Configuration............................................................................................................ 44

January 20, 2016

ZSSC3015NA1B Related Products

	ZSSC3015NA1B	ZSSC3015NA2R	ZSSC3015NE1C
Description	Integrated Device Technology Wafer (unsawn) - box	Sensor Interface Sensor Signal Conditoner	Integrated Device Technology Dice (Wafer sawn) - frame
Brand Name	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	WAFER	SOIC	WAFER
Manufacturer packaging code	DICE	DCG8	DICEF
Reach Compliance Code	compliant	compliant	compliant
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT	ANALOG CIRCUIT	ANALOG CIRCUIT
JESD-609 code	e3	e3	e3
Humidity sensitivity level	1	1	1
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260	NOT SPECIFIED
Terminal surface	Tin (Sn)	Matte Tin (Sn)	Tin (Sn)
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED

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