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9701-01

Description
UHF Male to FME Plug Adapter
CategoryAnalog mixed-signal IC    The signal circuit   
File Size277KB,13 Pages
ManufacturerpSemi (peregrine semiconductor)
Websitehttp://www.psemi.com/
Download Datasheet Parametric Compare View All

9701-01 Overview

UHF Male to FME Plug Adapter

9701-01 Parametric

Parameter NameAttribute value
MakerpSemi (peregrine semiconductor)
Parts packaging codeQFJ
package instructionHQCCJ,
Contacts44
Reach Compliance Codecompli
Is SamacsysN
Analog Integrated Circuits - Other TypesPHASE LOCKED LOOP
JESD-30 codeS-CQCC-J44
length16.51 mm
Number of functions1
Number of terminals44
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeHQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.15 V
Minimum supply voltage (Vsup)2.85 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
width16.51 mm
Base Number Matches1
Product Specification
PE9701
Product Description
Peregrine’s PE9701 is a high-performance integer-N PLL
capable of frequency synthesis up to 3.0 GHz. The device
is designed for superior phase noise performance while
providing an order of magnitude reduction in current
consumption, when compared with existing commercial
space PLLs.
The PE9701 features a 10/11 dual modulus prescaler,
counters, and a phase comparator as shown in Figure 1.
Counter values are programmable through either a serial or
parallel interface and can also be directly hard wired.
The PE9701 is optimized for commercial space
applications. Single Event Latch up (SEL) is physically
impossible and Single Event Upset (SEU) is better than
10
-9
errors per bit / day.
It is manufactured on Peregrine’s
UltraCMOS™ process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate, offering
excellent RF performance and intrinsic radiation tolerance.
Figure 1. Block Diagram
3000 MHz UltraCMOS™ Integer-N PLL
Rad Hard for Space Applications
Features
3.0 GHz operation
÷10/11 dual modulus prescaler
Internal phase detector with charge
pump
Serial, parallel or hardwired
programmable
Ultra-low phase noise
SEU < 10
-9
errors / bit-day
100 Krad (Si) total dose
44-lead CQFJ
F
in
F
in
Prescaler
10/11
Main
Counter
13
f
p
D(7:0)
8
Sdata
Pre_en
M(6:0)
A(3:0)
R(3:0)
f
r
Primary
20-bit
20
Latch
Secon-
dary
20-bit
Latch
20
20
20
16
Phase
Detector
PD_U
PD_D
Charge
Pump
CP
6
6
f
c
R Counter
Document No. 70-0035-02
www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 13

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