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PI6C48533-01

Description
6C SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
Categorysemiconductor    logic   
File Size263KB,7 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric View All

PI6C48533-01 Overview

6C SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20

PI6C48533-01 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals20
Minimum operating temperature-40 Cel
Maximum operating temperature85 Cel
Rated supply voltage3.3
Minimum supply/operating voltage3 V
Maximum supply/operating voltage3.6 V
Processing package description0.173 INCH, GREEN, TSSOP-20
each_compliYes
EU RoHS regulationsYes
China RoHS regulationsYes
stateActive
Logic IC typeLOW SKEW CLOCK DRIVER
sub_categoryClock Drivers
series6C
Max-Min frequency800 MHz
Enter conditionsDIFFERENTIAL MUX
jesd_30_codeR-PDSO-G20
jesd_609_codee3
moisture_sensitivity_level1
Number of inverted outputs0.0
Real output number4
Packaging MaterialsPLASTIC/EPOXY
ckage_codeTSSOP
ckage_equivalence_codeTSSOP20,.25
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
eak_reflow_temperature__cel_260
wer_supplies__v_3.3
._delay_nom_su1.5 ns
propagation delay TPD2 ns
qualification_statusCOMMERCIAL
Maximum same-side bending0.1000 ns
seated_height_max1.2 mm
surface mountYES
Temperature levelINDUSTRIAL
terminal coatingMATTE TIN
Terminal formGULL WING
Terminal spacing0.6500 mm
Terminal locationDUAL
ime_peak_reflow_temperature_max__s_40
length6.5 mm
width4.4 mm
PI6C48533-01
3.3V Low Skew 1-to-4
Differential/LVCMOS to LVPECL Fanout Buffer
Features
Pin-to-pin compatible to ICS8533-01
Maximum operation frequency: 800MHz
4 pair of differential LVPECL outputs
Selectable differential CLK and PCLK inputs
CLK,
n
CLK pair accepts LVDS, LVPECL, LVHSTL,
SSTL and HCSL input level
PCLK, nPCLK pair supports LVPECL, CML and SSTL
input level
Output Skew: 100ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 2ns (maximum)
3.3V power supply
Operating Temperature: -40
o
C to 85
o
C
Packaging (Pb-free & Green avaliable):
-20-pin TSSOP (L)
Description
The PI6C48533-01 is a high-performance low-skew LVPECL fanout
buffer. PI6C48533-01 features two selectable differential inputs and
translates to four LVPECL ultra-low jitter outputs. The inputs can
also be configured to single-ended with external resistor bias circuit.
The CLK input accepts LPECL or LVDS or LVHSTL or SSTL or
HCSL signals, and PCLK input accepts LVPECL or SSTL or CML
signals. The outputs are synchronized with input clock during asyn-
chronous assertion/deassertion of CLK_EN pin. PI6C48533-01 is
ideal for differential to LVPECL translations and/or LVPECL clock
distribution. Typical clock translation and distribution applications
are data-communications and telecommunications.
Block Diagram
CLK_EN
D
LE
CLK
n
CLK
PCLK
n
PCLK
0
1
Q
0
n
Q
0
Q
1
n
Q
1
Q
2
n
Q
2
Q
3
n
Q
3
Pin Diagram
V
EE
CLK_EN
CLK_SEL
CLK
n
CLK
Q
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q
0
n
Q
0
V
CC
Q
1
n
Q
1
PCLK
n
PCLK
Q
2
n
Q
2
NC
NC
V
CC
V
CC
Q
3
n
Q
3
CLK_SEL
1
PS8737B
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