This version: Apr.22. 1999
Semiconductor
MSC23V27207TD-xxBS9
2,097,152-Word x 72-Bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
DESCRIPTION
The MSC23V27207TD-xxBS9 is a 2,097,152-word x 72-bit CMOS dynamic random access memory module which
is composed of nine 16Mb(2Mx8) DRAMs in TSOP packages mounted with nine decoupling capacitors. This is an
168-pin dual in-line memory module. This module supports any application where high density and large capacity of
storage memory are required.
FEATURES
· 2,097,152-word x 72-bit organization
· 168-pin Dual In-line Memory Module
· Gold tab
· Single 3.3V power supply, ±0.3V tolerance
· Input
: LVTTL compatible
· Output
: LVTTL compatible, 3-state
· Refresh : 2048cycles/ 32ms
· /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability
· Fast page mode, read modify write capability
· Multi-bit test mode capability
· Serial Presence Detect
PRODUCT FAMILY
Access Time (Max.)
t
RAC
MSC23V27207TD-50BS9
MSC23V27207TD-60BS9
MSC23V27207TD-70BS9
50ns
60ns
70ns
t
AA
25ns
30ns
35ns
t
CAC
13ns
15ns
20ns
t
OEA
13ns
15ns
20ns
Cycle
Time
(Min.)
90ns
110ns
130ns
Power Dissipation (Max.)
Operating
3240mW
2916mW
2592mW
16.2mW
Standby
Family
Semiconductor
MSC23V27207TD
Serial PD Matrix
SPD Value
(Hex)
80
08
01
0B
0A
01
48
00
01
32
/RAS Access Time
3C
46
0D
/CAS Access Time
0F
14
DIMM Configuration type
Refresh Rate/Type
Primary DRAM Width
Error Checking DRAM Width
Superset Information
SPD Data Revision Code
-50
63
-60
-70
64-127
128-255
Reserved
Unused Storage Location (Reserved)
Checksum for Byte 0-62
02
00
08
08
00
01
3A
46
55
00
FF
128 Bytes
256 Bytes
Fast Page
11
10
1
72
0
LVTTL
50ns
60ns
70ns
13ns
15ns
20ns
ECC
Normal Refresh
x8
x8
Reserved
1
Byte No.
0
1
2
3
4
5
6
7
8
-50
9
-60
-70
-50
10
-60
-70
11
12
13
14
15-61
62
Function described
Number of Byte used
Total SPD Memory size
Memory type
Number of Rows
Number of Columns
Number of Banks
Module Data Width
Module Data Width Continued
Supply Voltage
Note