OKI Semiconductor
MSM6585
ADPCM Voice Synthesis IC
FEDL6585-03
Issue Date: Aug. 25, 2004
GENERAL DESCRIPTION
The MSM6585 is an version-up product of the MSM5205 voice synthesis IC. Mainly improved points
are improvement for the precision of an internal DA converter, a built-in low-pass filter, and
expansion on the sampling frequency. The MSM6585 does not include a control circuit to drive an
external memory similar to the MSM5205. Therefore, the MSM6585 can be connected with not only
semiconductor memories, but other memory media (CD-ROM, etc.) by the control of CPU.
FEATURES
• 4-bit ADPCM method
• Built-in 12-bit DA converter
• Built-in low-pass filter (LPF) (–40dB/oct)
• Sampling frequencies: 4k/8k/16k/32kHz
• Master clock frequency (ceramic oscillator) : 640kHz
•
Voice data synthesis: Supported by voice analysis editing tool AR207
•
Package options:
18-pin plastic DIP (DIP18-P-300-2.54) (MSM6585RS)
24-pin plastic SOP (SOP24-P-430-1.27-K) (MSM6585MAZXXX)
30-pin plastic SSOP (SSOP30-P-56-0.65-K) (MSM6585MBZXXX)
DIFFERENCES BETWEEN MSM6585 AND MSM5205
• Master clock frequency:
• Sampling frequency:
• ADPCM bit length:
• DA Converter:
• Low-pass filter:
• Overflow preventing circuit:
• Power supply voltage:
• Operating current consumption:
• Operating temperature:
• D3 to D0 input timing
VCK
(O)
D3 - D0
input timing
ADPCM Data
MSM6585
MSM5205
MSM6585
640kHz
4k/8k/16k/32kHz
4-bit
12-bit
Included (–40dB/oct)
Included
4.5 to 5.5V
10mA
–40 to +85°C
MSM5205
384kHz
4k/6k/8kHz
3-bit/4-bit
10-bit
Not included
Not included
3.0 to 6.0V
4mA
–30 to +70°C
1
¡ Semiconductor
MSM6585
PIN DESCRIPTION
Pin
DIP SOP SSOP
1
2
3
4-7
8
9
10
11
12
13
14
1
2
3
5, 7,
8, 10
11
12
13
14
16
17
18
1
2
6
7-10
14
15
16
17
21
22
23
Symbol
S1
I
S2
T3
D0-D3
T4
GND
AOUT
DAO
T1
T2
VCK
I
I
O
—
O
O
I
Type
Description
Pins to determine the sampling frequency.
The sampling frequencies of 32k, 16k, 8k, and 4kHz can be selected by
combinations. (See the sampling frequencies in FUNCTIONAL
DESCRIPTION on the selection of combinations.)
Pin to test the internal circuit. Set this pin to a high level or make it open
because it has a built-in pull-up resistor.
Input pins for ADPCM data.
Pin to test the internal circuit. Make this pin open.
Pin to test the internal circuit. Make this pin open.
Ground pin
Pin to output the analog voice from the low-pass filter. Connect a 0.01
mF
capacitor to this pin. (See the AOUT connecting circuit in FUNCTIONAL
DESCRIPTION on the connecting circuit.)
Pin to output the analog voice from the DA converter.
Pins to test the internal circuit. Set these pins to a low level or make them
open because pull-down resistors are included.
This pin outputs the sampling frequency selected by the combinations of
O
S1 and S2.
The voice synthesis starts or stops by synchronizing with
VCK.
Reset pin. The voice synthesis circuit is initialized by synchronizing with
15
20
24
RESET
I
VCK.
If this pin is set to a high level, the D0 to D3 data inputs are disabled
by synchronizing with
VCK.
The AOUT and DA0 pins output 1/2 V
DD
and
become the state of no voice.
16
17
18
22
23
24
25
29
30
XT
XT
V
DD
I
O
—
Pin to connect an oscillator. When the external clock is used, input it
from this pin.
Pin to connect an oscillator.
When the external clock is used, make this pin open.
Power supply pin. Insert a bypass capacitor of 0.1
mF
or more between
this pin and the GND pin.
4
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