Features
•
80C52 Compatible
– 8051 Pin and Instruction Compatible
– Four 8-bit I/O ports + 2 I/O 2-wire Interface (TWI) Pins
– Three 16-bit Timer/Counters
– 256 bytes Scratch Pad RAM
– 10 Interrupt Sources with 4 Priority Levels
– Dual Data Pointer
Variable Length MOVX for Slow RAM/Peripherals
ISP (In-System-Programming) Using Standard V
cc
Power Supply
Boot ROM Contains Low Level Flash Programming Routines and a Default Serial
Loader
High-speed Architecture
– In Standard Mode:
40 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
– In X2 mode (6 Clocks/machine cycle)
20 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
– 32K Bytes On-chip Flash Program/Data Memory
– Byte and Page (128 Bytes) Erase and Write
– 100K Write Cycles
On-chip 1024 Bytes Expanded RAM (XRAM)
– Software Selectable Size (0, 256, 512, 768, 1024 Bytes)
– 256 Bytes Selected at Reset for TS87C51RB2/RC2 Compatibility
Keyboard Interrupt Interface on Port P1
400-Kbits/s Multimaster 2-wire Interface
SPI Interface (Master/Slave Mode)
Sub-clock 32 kHz Crystal Oscillator
8-bit clock Prescaler
Improved X2 Mode With Independant Selection for CPU and Each Peripheral
Programmable Counter Array 5 Channels with:
– High Speed Output
– Compare/Capture
– Pulse Width Modulator
– Watchdog Timer Capabilities
Asynchronous Port Reset
Full-duplex Enhanced UART
Dedicated Baud Rate Generator for UART
Low EMI (Inhibit ALE)
Hardware Watchdog Timer (One-time enabled with Reset-Out)
Power Control Modes:
– Idle Mode
– Power-down Mode
– Power-Off Flag
Power Supply:
– 2.7 to 3.6 (3V Version)
– 2.7 to 5.5V (5V Version)
Temperature Ranges: Commercial (0 to +70°C) and Industrial (-40°C to +85°C)
Packages: PLC44, VQFP44
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8-bit Flash
Microcontroller
with 2-wire
Interface
AT89C51IC2
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Rev. 4301C–8051–06/06
1
Description
AT89C51IC2 is a high performance Flash version of the 80C51 8-bit microcontrollers. It
contains a 32K bytes Flash memory block for program and data.
The 32K bytes Flash memory can be programmed either in parallel mode or in serial
mode with the ISP capability or with software. The programming voltage is internally
generated from the standard V
CC
pin.
The AT89C51IC2 retains all features of the 80C52 with 256 bytes of internal RAM, a
10-source 4-level interrupt controller and three timer/counters.
In addition, the AT89C51IC2 has a 32 kHz Subsidiary clock Oscillator, a Programmable
Counter Array, an XRAM of 1024 byte, a Hardware Watchdog Timer, a Keyboard Inter-
face, a 2-wire interface, an SPI Interface, a more versatile serial channel
that facilitates multiprocessor communication (EUART) and a speed improvement
mechanism (X2 mode).
The fully static design of the AT89C51IC2 allows to reduce system power consumption
by bringing the clock frequency down to any value, even DC, without loss of data.
The AT89C51IC2 has 2 software-selectable modes of reduced activity and 8-bit clock
prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen
while the peripherals and the interrupt system are still operating. In the power-down
mode the RAM is saved and all other functions are inoperative.
The added features of the AT89C51IC2 make it more powerful for applications that need
pulse width modulation, high speed I/O and counting capabilities such as alarms, motor
control, corded phones, smart card readers.
Table 1.
Memory Size
PLCC44
VQFP44 1.4
T89C51IC2
Flash (bytes)
32k
XRAM (bytes)
1024
TOTAL RAM
(bytes)
1280
I/O
34
2
AT89C51IC2
4301C–8051–06/06
AT89C51IC2
Block Diagram
Figure 1.
Block Diagram
T2EX
SDA
Key
Board
RxD
PCA
TxD
Vcc
Vss
ECI
T2
SCL
SPI
(1) (1) (1) (1)
P4
P1
P0
P3
P2
MISO
MOSI
SCK
SS
(2) (2)
(1) (1)
(1)
(1)
XTAL1
XTAL2
EUART
+
BRG
RAM
256
x8
Flash
PCA
Timer 2
Two-Wire
32K x 8
ALE/PROG
PSEN
EA
CPU
C51
CORE
IB-bus
RD
WR
(2)
(2)
Timer 0
Timer 1
INT
Ctrl
Parallel I/O Ports & Ext Bus
Port 0 Port 1 Port 2 Port 3
Port 12
Watch
Dog
(2) (2)
Reset
T0
T1
(2) (2)
INT0
INT1
(1): Alternate function of Port 1
(2): Alternate function of Port 3
3
4301C–8051–06/06
SFR Mapping
The Special Function Registers (SFRs) of the AT89C51IC2 fall into the following
categories:
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C51 core registers: ACC, B, DPH, DPL, PSW, SP
I/O port registers: P0, P1, P2, P3, PI2
Timer registers: T2CON, T2MOD, TCON, TH0, TH1, TH2, TMOD, TL0, TL1, TL2,
RCAP2L, RCAP2H
Serial I/O port registers: SADDR, SADEN, SBUF, SCON
PCA (Programmable Counter Array) registers: CCON, CCAPMx, CL, CH, CCAPxH,
CCAPxL (x: 0 to 4)
Power and clock control registers: PCON
Hardware Watchdog Timer registers: WDTRST, WDTPRG
Interrupt system registers: IEN0, IPL0, IPH0, IEN1, IPL1, IPH1
Keyboard Interface registers: KBE, KBF, KBLS
SPI registers: SPCON, SPSTR, SPDAT
2-wire Interface registers: SSCON, SSCS, SSDAT, SSADR
BRG (Baud Rate Generator) registers: BRL, BDRCON
Flash register: FCON
Clock Prescaler register: CKRL
32 kHz Sub Clock Oscillator registers: CKSEL, OSSCON
4
AT89C51IC2
4301C–8051–06/06
AT89C51IC2
Table 2.
C51 Core SFRs
Mnemonic
ACC
B
PSW
SP
DPL
DPH
Add
E0h
F0h
D0h
81h
82h
83h
Name
Accumulator
B Register
Program Status Word
Stack Pointer
Data Pointer Low byte
Data Pointer High byte
CY
AC
F0
RS1
RS0
OV
F1
P
7
6
5
4
3
2
1
0
Table 3.
System Management SFRs
Mnemonic
PCON
AUXR
Add
87h
8Eh
Name
Power Control
Auxiliary Register 0
7
SMOD1
-
6
SMOD0
-
5
-
M0
ENBOO
T
-
-
-
PCAX2
-
4
-
3
GF1
XRS1
2
GF0
XRS0
1
PD
EXTRA
M
-
-
-
OscBEn
T0X2
-
0
IDL
AO
AUXR1
CKRL
CKSEL
OSCON
CKCKON0
CKCKON1
A2h
97h
85h
86h
8Fh
AFh
Auxiliary Register 1
Clock Reload Register
Clock Selection Register
Oscillator Control Register
Clock Control Register 0
Clock Control Register 1
-
-
-
-
TWIX2
-
-
-
-
-
WDTX2
-
-
-
-
-
SIX2
-
GF3
-
-
-
T2X2
-
0
-
-
SCLKT0
T1X2
-
DPS
-
CKS
OscAEn
X2
SPIX2
Table 4.
Interrupt SFRs
Mnemonic
IEN0
IEN1
IPH0
IPL0
IPH1
IPL1
Add
A8h
B1h
B7h
B8h
B3h
B2h
Name
Interrupt Enable Control 0
Interrupt Enable Control 1
Interrupt Priority Control High 0
Interrupt Priority Control Low 0
Interrupt Priority Control High 1
Interrupt Priority Control Low 1
7
EA
-
-
-
-
-
6
EC
-
PPCH
PPCL
-
-
5
ET2
-
PT2H
PT2L
-
-
4
ES
-
PHS
PLS
-
-
3
ET1
-
PT1H
PT1L
-
-
2
EX1
ESPI
PX1H
PX1L
SPIH
SPIL
1
ET0
ETWI
PT0H
PT0L
TWIH
TWIL
0
EX0
KBD
PX0H
PX0L
KBDH
KBDL
5
4301C–8051–06/06