Features
•
Single 2.7V - 3.6V Supply
•
Serial Peripheral Interface (SPI) Compatible
•
•
– Supports SPI Modes 0 and 3
70 MHz Maximum Clock Frequency
Flexible, Uniform Erase Architecture
– 4-Kbyte Blocks
– 32-Kbyte Blocks
– 64-Kbyte Blocks
– Full Chip Erase
Individual Sector Protection with Global Protect/Unprotect Feature
– Thirty-two 64-Kbyte Physical Sectors
Hardware Controlled Locking of Protected Sectors
Flexible Programming Options
– Byte/Page Program (1 to 256 Bytes)
– Sequential Program Mode Capability
Automatic Checking and Reporting of Erase/Program Failures
JEDEC Standard Manufacturer and Device ID Read Methodology
Low Power Dissipation
– 5 mA Active Read Current (Typical)
– 10 µA Deep Power-down Current (Typical)
Endurance: 100,000 Program/Erase Cycles
Data Retention: 20 Years
Complies with Full Industrial Temperature Range
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (150-mil and 200-mil wide)
– 8-contact MLF (5 x 6 mm)
•
•
•
•
•
•
16-megabit
2.7-volt Only
Serial Firmware
DataFlash
®
Memory
AT26DF161A
Preliminary
•
•
•
•
1. Description
The AT26DF161A is a serial interface Flash memory device designed for use in a
wide variety of high-volume consumer-based applications in which program code is
shadowed from Flash memory into embedded or external RAM for execution. The
flexible erase architecture of the AT26DF161A, with its erase granularity as small as
4 Kbytes, makes it ideal for data storage as well, eliminating the need for additional
data storage EEPROM devices.
The physical sectoring and the erase block sizes of the AT26DF161A have been opti-
mized to meet the needs of today’s code and data storage applications. By optimizing
the size of the physical sectors and erase blocks, the memory space can be used
much more efficiently. Because certain code modules and data storage segments
must reside by themselves in their own protected sectors, the wasted and unused
memory space that occurs with large sectored and large block erase Flash memory
devices can be greatly reduced. This increased memory space efficiency allows addi-
tional code routines and data storage segments to be added while still maintaining the
same overall device density.
3640A–DFLASH–11/06
The AT26DF161A also offers a sophisticated method for protecting individual sectors against
erroneous or malicious program and erase operations. By providing the ability to individually pro-
tect and unprotect sectors, a system can unprotect a specific sector to modify its contents while
keeping the remaining sectors of the memory array securely protected. This is useful in applica-
tions where program code is patched or updated on a subroutine or module basis, or in
applications where data storage segments need to be modified without running the risk of errant
modifications to the program code segments. In addition to individual sector protection capabili-
ties, the AT26DF161A incorporates Global Protect and Global Unprotect features that allow the
entire memory array to be either protected or unprotected all at once. This reduces overhead
during the manufacturing process since sectors do not have to be unprotected one-by-one prior
to initial programming.
Specifically designed for use in 3-volt systems, the AT26DF161A supports read, program, and
erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for
programming and erasing.
2
AT26DF161A
3640A–DFLASH–11/06
AT26DF161A
2. Pin Descriptions and Pinouts
Table 2-1.
Symbol
Pin Descriptions
Name and Function
CHIP SELECT:
Asserting the CS pin selects the device. When the CS pin is deasserted, the
device will be deselected and normally be placed in standby mode (not Deep Power-down mode),
and the SO pin will be in a high-impedance state. When the device is deselected, data will not be
accepted on the SI pin.
A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition
is required to end an operation. When ending an internally self-timed operation such as a program
or erase cycle, the device will not enter the standby mode until the completion of the operation.
SERIAL CLOCK:
This pin is used to provide a clock to the device and is used to control the flow of
data to and from the device. Command, address, and input data present on the SI pin is always
latched on the rising edge of SCK, while output data on the SO pin is always clocked out on the
falling edge of SCK.
SERIAL INPUT:
The SI pin is used to shift data into the device. The SI pin is used for all data input
including command and address sequences. Data on the SI pin is always latched on the rising
edge of SCK.
SERIAL OUTPUT:
The SO pin is used to shift data out from the device. Data on the SO pin is
always clocked out on the falling edge of SCK.
WRITE PROTECT:
The WP pin controls the hardware locking feature of the device. Please refer to
section
“Protection Commands and Features” on page 15
for more details on protection features
and the WP pin.
The WP pin is internally pulled-high and may be left floating if hardware-controlled protection will
not be used. However, it is recommended that the WP pin also be externally connected to V
CC
whenever possible.
HOLD:
The HOLD pin is used to temporarily pause serial communication without deselecting or
resetting the device. While the HOLD pin is asserted, transitions on the SCK pin and data on the
SI pin will be ignored, and the SO pin will be in a high-impedance state.
The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold
condition to start. A Hold condition pauses serial communication only and does not have an effect
on internally self-timed operations such as a program or erase cycle. Please refer to section
“Hold”
on page 30
for additional details on the Hold operation.
The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be used.
However, it is recommended that the HOLD pin also be externally connected to V
CC
whenever
possible.
DEVICE POWER SUPPLY:
The V
CC
pin is used to supply the source voltage to the device.
Operations at invalid V
CC
voltages may produce spurious results and should not be attempted.
GROUND:
The ground reference for the power supply. GND should be connected to the
system ground.
Asserted
State
Type
CS
Low
Input
SCK
Input
SI
Input
SO
Output
WP
Low
Input
HOLD
Low
Input
V
CC
GND
Power
Power
Figure 2-1.
CS
SO
WP
GND
8-SOIC Top View
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
Figure 2-2.
CS
SO
WP
GND
8-MLF Top View
1
2
3
4
VCC
7
HOLD
6
SCK
5
SI
8
3
3640A–DFLASH–11/06
3. Block Diagram
CS
CONTROL AND
PROTECTION LOGIC
I/O BUFFERS
AND LATCHES
SCK
SI
SO
SRAM
DATA BUFFER
INTERFACE
CONTROL
AND
LOGIC
ADDRESS LATCH
Y-DECODER
Y-GATING
WP
X-DECODER
FLASH
MEMORY
ARRAY
4. Memory Array
To provide the greatest flexibility, the memory array of the AT26DF161A can be erased in four
levels of granularity including a full chip erase. In addition, the array has been divided into phys-
ical sectors of various sizes, of which each sector can be individually protected from program
and erase operations. The sizes of the physical sectors are optimized for both code and data
storage applications, allowing both code and data segments to reside in their own isolated
regions.
Figure 4-1 on page 5
illustrates the breakdown of each erase level as well as the break-
down of each physical sector.
4
AT26DF161A
3640A–DFLASH–11/06
AT26DF161A
Figure 4-1.
Memory Architecture Diagram
Block Erase Detail
Internal
Sectoring
for
Sector
Protection
Function
64KB
32KB
Block Erase
Block Erase
(D8h Command) (52h Command)
4KB
Block Erase
(20h Command)
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
Block Address
Range
1FFFFFh
1FEFFFh
1FDFFFh
1FCFFFh
1FBFFFh
1FAFFFh
1F9FFFh
1F8FFFh
1F7FFFh
1F6FFFh
1F5FFFh
1F4FFFh
1F3FFFh
1F2FFFh
1F1FFFh
1F0FFFh
1EFFFFh
1EEFFFh
1EDFFFh
1ECFFFh
1EBFFFh
1EAFFFh
1E9FFFh
1E8FFFh
1E7FFFh
1E6FFFh
1E5FFFh
1E4FFFh
1E3FFFh
1E2FFFh
1E1FFFh
1E0FFFh
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1FF000h
1FE000h
1FD000h
1FC000h
1FB000h
1FA000h
1F9000h
1F8000h
1F7000h
1F6000h
1F5000h
1F4000h
1F3000h
1F2000h
1F1000h
1F0000h
1EF000h
1EE000h
1ED000h
1EC000h
1EB000h
1EA000h
1E9000h
1E8000h
1E7000h
1E6000h
1E5000h
1E4000h
1E3000h
1E2000h
1E1000h
1E0000h
Page Program Detail
1-256 Byte
Page Program
(02h Command)
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
Page Address
Range
1FFFFFh
1FFEFFh
1FFDFFh
0FFCFFh
1FFBFFh
1FFAFFh
1FF9FFh
1FF8FFh
1FF7FFh
1FF6FFh
1FF5FFh
1FF4FFh
1FF3FFh
1FF2FFh
1FF1FFh
1FF0FFh
1FEFFFh
1FEEFFh
1FEDFFh
1FECFFh
1FEBFFh
1FEAFFh
1FE9FFh
1FE8FFh
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1FFF00h
1FFE00h
1FFD00h
0FFC00h
1FFB00h
1FFA00h
1FF900h
1FF800h
1FF700h
1FF600h
1FF500h
1FF400h
1FF300h
1FF200h
1FF100h
1FF000h
1FEF00h
1FEE00h
1FED00h
1FEC00h
1FEB00h
1FEA00h
1FE900h
1FE800h
32KB
64KB
(Sector 31)
64KB
32KB
32KB
64KB
(Sector 30)
64KB
32KB
32KB
64KB
(Sector 0)
64KB
32KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
00FFFFh
00EFFFh
00DFFFh
00CFFFh
00BFFFh
00AFFFh
009FFFh
008FFFh
007FFFh
006FFFh
005FFFh
004FFFh
003FFFh
002FFFh
001FFFh
000FFFh
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
00F000h
00E000h
00D000h
00C000h
00B000h
00A000h
009000h
008000h
007000h
006000h
005000h
004000h
003000h
002000h
001000h
000000h
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
256 Bytes
•••
0017FFh
0016FFh
0015FFh
0014FFh
0013FFh
0012FFh
0011FFh
0010FFh
000FFFh
000EFFh
000DFFh
000CFFh
000BFFh
000AFFh
0009FFh
0008FFh
0007FFh
0006FFh
0005FFh
0004FFh
0003FFh
0002FFh
0001FFh
0000FFh
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
001700h
001600h
001500h
001400h
001300h
001200h
001100h
001000h
000F00h
000E00h
000D00h
000C00h
000B00h
000A00h
000900h
000800h
000700h
000600h
000500h
000400h
000300h
000200h
000100h
000000h
•••
•••
•••
•••
5
3640A–DFLASH–11/06