N74LV00PWDH datasheet, PDF - EEWORLD Datasheet

EEWORLDEEWORLD

Datasheet

Datasheet> All Categories > logic> N74LV00PWDH

Preview

N74LV00PWDH: DescriptionIC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate; Categorylogic; File Size190KB，12 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

Download Datasheet Parametric Compare View All

N74LV00PWDH Overview

IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate

N74LV00PWDH Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	TSSOP,
Reach Compliance Code	unknown
series	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14
length	5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	18 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	4.4 mm
Base Number Matches	1

Preview

Download Datasheet

View All

N74LV00PWDH Related Products

	N74LV00PWDH	N74LV00D-T	N74LV00PW-T	N74LV00DB-T	N74LV00PWDH-T	N74LV00N	N74LV00PW	N74LV00DB	N74LV00D
Description	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDIP14	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate
Maker	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP
package instruction	TSSOP,	SOP,	TSSOP,	SSOP,	TSSOP,	DIP,	TSSOP,	SSOP,	SOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDIP-T14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
length	5 mm	8.65 mm	5 mm	6.2 mm	5 mm	19.025 mm	5 mm	6.2 mm	8.65 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE
Number of functions	4	4	4	4	4	4	4	4	4
Number of entries	2	2	2	2	2	2	2	2	2
Number of terminals	14	14	14	14	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SOP	TSSOP	SSOP	TSSOP	DIP	TSSOP	SSOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE
propagation delay (tpd)	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1.75 mm	1.1 mm	2 mm	1.1 mm	4.2 mm	1.1 mm	2 mm	1.75 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1 V	1 V	1 V	1 V	1 V	1 V	1 V	1 V	1 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	NO	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	0.65 mm	0.65 mm	0.65 mm	2.54 mm	0.65 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	4.4 mm	3.9 mm	4.4 mm	5.3 mm	4.4 mm	7.62 mm	4.4 mm	5.3 mm	3.9 mm
Base Number Matches	1	1	1	1	1	1	1	1	-

Recommended Resources

Headphone circuit using field effect tube as muffler tube

SHD106 type two feed water pumps, one in use and one in standby, automatically rotate and start at full pressure, and the standby pump current controls the self-throwing (pool) circuit a

QX2011 application circuit

Bootstrap staircase wave circuit

Digital tube extinguishing circuit

Multi-frequency signal generator circuit

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components