N74LV00N datasheet, PDF - EEWORLD Datasheet

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N74LV00N: DescriptionLV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDIP14; Categorylogic logic; File Size190KB，12 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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N74LV00N Overview

LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDIP14

N74LV00N Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	DIP,
Reach Compliance Code	unknown
series	LV/LV-A/LVX/H
JESD-30 code	R-PDIP-T14
length	19.025 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	18 ns
Certification status	Not Qualified
Maximum seat height	4.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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N74LV00N Related Products

	N74LV00N	N74LV00D-T	N74LV00PW-T	N74LV00DB-T	N74LV00PWDH	N74LV00PWDH-T	N74LV00PW	N74LV00DB	N74LV00D
Description	LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDIP14	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate	IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, Gate
Maker	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP
package instruction	DIP,	SOP,	TSSOP,	SSOP,	TSSOP,	TSSOP,	TSSOP,	SSOP,	SOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 code	R-PDIP-T14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
length	19.025 mm	8.65 mm	5 mm	6.2 mm	5 mm	5 mm	5 mm	6.2 mm	8.65 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE
Number of functions	4	4	4	4	4	4	4	4	4
Number of entries	2	2	2	2	2	2	2	2	2
Number of terminals	14	14	14	14	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SOP	TSSOP	SSOP	TSSOP	TSSOP	TSSOP	SSOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE
propagation delay (tpd)	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns	18 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.2 mm	1.75 mm	1.1 mm	2 mm	1.1 mm	1.1 mm	1.1 mm	2 mm	1.75 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1 V	1 V	1 V	1 V	1 V	1 V	1 V	1 V	1 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	THROUGH-HOLE	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	2.54 mm	1.27 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	7.62 mm	3.9 mm	4.4 mm	5.3 mm	4.4 mm	4.4 mm	4.4 mm	5.3 mm	3.9 mm
Base Number Matches	1	1	1	1	1	1	1	1	-

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