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5962-9669105HYC

Description
Standard SRAM, 128KX8, 55ns, CMOS, DIP-32
Categorystorage   
File Size176KB,30 Pages
ManufacturerWhite Microelectronics
Download Datasheet Parametric View All

5962-9669105HYC Overview

Standard SRAM, 128KX8, 55ns, CMOS, DIP-32

5962-9669105HYC Parametric

Parameter NameAttribute value
MakerWhite Microelectronics
package instructionDIP-32
Reach Compliance Codeunknown
Maximum access time55 ns
JESD-30 codeR-XDIP-T32
JESD-609 codee4
length41.91 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX8
Package body materialUNSPECIFIED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height5.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width15.24 mm
Base Number Matches1
REVISIONS
LTR
A
B
DESCRIPTION
Added device type11. Change limits for I
CC
and I
CCDR1
in table I.
Add: note to paragraph 1.2.2 and table I, conditions. Add device types
12 through 17. Add vendor CAGE code 0EU86. Add condition D to
paragraphs 4.2.a.1 and 4.3.3.b.1. Changes to table I and dimensions
to case outlines T, U, X, Y, and Z. Table I, add note 3 to C
IN
and C
OUT
.
Add case outline N.
Updated drawing to latest requirements. -sld
DATE (YR-MO-DA)
98-06-22
01-03-01
APPROVED
K. A. Cottongim
Raymond Monnin
C
D
01-03-21
06-03-07
Raymond Monnin
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
D
15
D
16
D
17
D
18
REV
SHEET
PREPARED BY
Gary Zahn
CHECKED BY
Michael C. Jones
D
19
D
20
D
21
D
1
D
22
D
2
D
23
D
3
D
24
D
25
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
D
12
D
13
D
14
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil/
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, MEMORY, DIGITAL, CMOS,
SRAM, 128K x 8-BIT, MONOLITHIC SILICON
DRAWING APPROVAL DATE
96-10-30
REVISION LEVEL
D
SIZE
A
SHEET
CAGE CODE
67268
1 OF
25
5962-96691
5962-E298-06
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
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