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74ACT521CW

Description
Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, WAFER
Categorylogic   
File Size79KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

74ACT521CW Overview

Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, WAFER

74ACT521CW Parametric

Parameter NameAttribute value
MakerFairchild
Parts packaging codeWAFER
package instructionDIE,
Reach Compliance Codeunknown
seriesACT
JESD-30 codeX-XUUC-N20
Logic integrated circuit typeIDENTITY COMPARATOR
Number of digits8
Number of functions1
Number of terminals20
Output polarityINVERTED
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeUNSPECIFIED
Package formUNCASED CHIP
propagation delay (tpd)10 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Terminal formNO LEAD
Terminal locationUPPER
Base Number Matches1
74AC521 • 74ACT521 8-Bit Identity Comparator
November 1988
Revised November 1999
74AC521 • 74ACT521
8-Bit Identity Comparator
General Description
The AC/ACT521 is an expandable 8-bit comparator. It
compares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
A
=
B
also serves as an active LOW enable
input.
Features
s
I
CC
reduced by 50%
s
Compares two 8-bit words in 6.5 ns typ
s
Expandable to any word length
s
20-pin package
s
Outputs source/sink 24 mA
s
ACT521 has TTL-compatible inputs
Ordering Code:
Order Number
74AC521SC
74AC521SJ
74AC521PC
74ACT521SC
74ACT521SJ
74ACT521PC
Package Number
M20B
M20D
N20A
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A
0
–A
7
B
0
–B
7
T
A
=
B
O
A
=
B
FACT is a trademark of Fairchild Semiconductor Corporation.
Description
Word A Inputs
Word B Inputs
Expansion or Enable Input
Identity Output
© 1999 Fairchild Semiconductor Corporation
DS009964
www.fairchildsemi.com

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