530DB1213M00DGR datasheet, PDF

Datasheet> All Categories > oscillator> 530DB1213M00DGR

530DB1213M00DGR: DescriptionCMOS/TTL Output Clock Oscillator, 1213MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530DB1213M00DGR Overview

CMOS/TTL Output Clock Oscillator, 1213MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530DB1213M00DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1213 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

How should bipolar power circuits be designed?

Overcurrent detection circuit

GZ-600 argon arc welding machine circuit-01

Small hydropower station motor speed regulation and overrun protection circuit

TOP switch application circuit diagram in switching power supply

Circuit diagram for adding visual judgment to phone ringing

Beginner's Questions: :) How can I use Keil Vision2 to create a project that can be burned into Proteus? I am a beginner, please help me....; 老高在这里 51mcu

DM6446?: I have a question about DM6446: In what environment was it developed? DM642 is developed in CCS....; cjie6916 Analogue and Mixed Signal

Is there any difference between ADI's software-defined radio and traditional hardware radio?: What is the difference between ADI's software-defined radio and traditional hardware radio? Can you explain it in a simple and vivid way? The concept is a bit abstract and I don't quite understand it....; OHNO ADI Reference Circuit

There are some problems with a simple simulated serial communication program. Please take a look.: #include"reg52.h" void send_bit(unsigned char i) { if(i) TXD=1; else TXD=0; TR0=1; while(!TF0); TR0=0; TH0=0xFF; TL0=0xA0; } void main() { unsigned char a=0xE4; unsigned int i,j; TMOD|=0x01; TH0=0xFF;...; hantoufool Embedded System

Let's learn about the voltage used in various countries around the world: [i=s]This post was last edited by qwqwqw2088 on 2014-12-1 08:41[/i] [p=25, null, left][color=rgb(62, 62, 62)]Currently, there are three types of voltages used for indoor electricity in countries aroun...; qwqwqw2088 Analogue and Mixed Signal

TI's latest CapTIvate touch microcontroller technology live broadcast is now open for registration! Register and participate to get gifts!: [p=23, null, left][color=rgb(0, 0, 0)][backcolor=rgb(255, 255, 255)][size=10.5pt][font=微软雅黑][size=3][color=Red][size=4][size=3][color=Black]TI technology experts will live broadcast the latest CapTIva...; EEWORLD社区 TI Technology Forum

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components