White Electronic Designs
PCMCIA Flash Memory Card
FLD Series
PCMCIA Flash Memory Card - 4 MEGABYTE through
40 MEGABYTE (AMD based)
GENERAL DESCRIPTION
WEDCs PCMCIA Flash memory cards offer high den-
sity linear Flash solid state storage solutions for code
and data storage, high performance disk emulation and
execute in place (XIP) applications in mobile PC and
dedicated (embedded) equipment.
Packaged in a PCMCIA type I housing, each card con-
tains a connector, an array of Flash memories pack-
aged in TSOP packages and card control logic. The
card control logic provides the system interface and
controls the internal Flash memories. Combined with
file management software, such as Flash Translation
Layer (FTL), WEDC Flash cards provide removable high-
performance disk emulation.
The WEDC FLD series is based on AMD Flash memo-
ries. The FLD series offers byte wide and word wide
operation, low power modes and Card Information Struc-
ture (CIS) for easy identification of card characteristics.
Note:
Standard options include attribute memory. Cards without attribute
memory are available. Cards are also available with or without a
hardware write protect switch.
ARCHITECTURE OVERVIEW
WEDCs FLD series is designed to support from two to
twenty (see Block diagram) 16Mb components, provid-
ing a wide range of density options. Cards are based
on the Am29F017 (16Mb) device for 5V only applica-
tions. The device code for the Am29F017 is 3Dh and the
manufacturers ID is 01h. This card is compatible with
D series cards from AMD. Cards utilizing 16Mb compo-
nents provide densities ranging from 4MB to 40MB in
4MB increments.
In support of the PC Card (PCMCIA) standard for word
wide access, devices are paired. Therefore, the Flash
array is structured in 64K word (128kB)blocks. Write,
read operations can be performed as either a word or
byte wide operation. By multiplexing A0, CE1# and CE2#,
8-bit hosts can access all data on data lines DQ0 -
DQ7. The FLD series cards conform with the PC Card
Standard (formerly PCMCIA) and supported JEIDA, pro-
viding electrical and physical compatibility. The PC Card
form factor offers an industry standard pinout and me-
chanical outline, allowing density upgrades without sys-
tem design changes.
WEDCs standard cards are shipped with WEDCs
silkscreen design. Cards are also available with blank
housings (no silkscreen). The blank housings are avail-
able in both a recessed (for label) and flat housing.
Please contact your WEDC sales representative for fur-
ther information on Custom artwork.
FEATURES
n
Low cost High Density Linear Flash Card
n
Supports 5V only systems
n
Based on AMD Am29F017 Flash Components
- low standby power without entering reset mode
- allows standard access from standby mode
n
Fast Read Performance
n
x8/ x16 Data Interface
- 150ns Maximum Access Time
n
High Performance Random Writes
- 7µs typical Word Write Time
n
Automated Write and Erase Algorithms
- AMD Command Set
n
1 000,000 Erase Cycles per Block
n
64K word (128kB) symmetrical Block Architecture
n
PC Card Standard Type I Form Factor
March 2003 Rev. 6
ECO #16058
1
White Electronic Designs Corporation (508) 485-4000 www.whiteedc.com
White Electronic Designs
BLOCK DIAGRAM
PCMCIA Flash Memory Card
FLD Series
Device type
Am29F017
Manuf ID
01
H
Device ID
3D
H
Device Pair (N/2 - 1)
Device (N-1)
Device (N-2)
CSn
Array
Address
Bus
ADDRESS
BUFFER
ADDRESS BUS
A
1
-A
25
Control
Address
Bus
M Res
WL
RL
WH
RH
CSn
Device 3
Device 2
CS
1
CS
0
Q2
Q0
Ctrl
Control Logic
PCMCIA Interface
Qn
WE
OE
CE
2
CE
1
REG
A
0
WP
Device Pair 1
At/Reg enable
Device Pair 0
Device 1
Device 0
CS
0
Vcc
WH
RH
DATA
BUS
Q
8
-Q
15
DATA
BUS
Q
0
-Q
7
WL
RL
0000h
attrib. mem
CIS
EEPROM 2kB
Vcc
control
Q
0
-Q
7
Vcc
I/O buffer
DATA
BUS
D
8
-D
15
DATA
BUS
D
0
-D
7
White Electronic Designs Corporation Marlborough MA (508) 485-4000
2
White Electronic Designs
P
INOUT
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
CE
1
A
10
OE
A
11
A
9
A
8
A
13
A
14
WE
RDY/BSY
V
CC
V
PP
1
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
WP
GND
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
PCMCIA Flash Memory Card
FLD Series
P
INOUT CONT
.
Signal name
GND
CD
1
DQ
11
DQ
12
DQ
13
DQ
14
DQ
15
CE
2
VS
1
RFU
RFU
A
17
A
18
A
19
A
20
A
21
V
CC
V
PP
2
A
22
A
23
A
24
A
25
VS
2
RST
Wait
RFU
REG
BVD
2
BVD
1
DQ
8
DQ
9
DQ
10
CD
2
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1N.C.
Reserved
Reserved
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
Extended Bus cycle
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
Ground
Active
LOW
LOW
LOW
LOW
LOW
LOW
N.C.
I
I
I
I
I
2MB(3)
4MB(3)
N.C.
8MB(3)
16MB(3)
32MB(3)
64MB(3)
N.C.
HIGH
LOW(2)
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I
I
I
I
O
I
O
I
O
O
I/O
I/O
O
O
(2)
(2)
HIGH
LOW
Notes:
1. RDY/BSY is an open drain output, external pull-up resistor is required.
2. Wait, BVD
1
and BVD
2
are driven high for compatibility.
3. Shows density for which specified address bit is MSB.
Higher order address bits are no connects (ie 4MB A
21
is MSB A
22
- A
25
are NC).
MECHANICAL
.063
3.370
.039
2.126
.039
.400
.130
3
White Electronic Designs Corporation (508) 485-4000 www.whiteedc.com
White Electronic Designs
Symbol
A
0
- A
25
DQ
0
- DQ
15
CE
1
, CE
2
OE
WE
RDY/BSY
Type
INPUT
INPUT/OUTPUT
DQ15 is the MSB.
INPUT
INPUT
INPUT
OUTPUT
Name and Function
PCMCIA Flash Memory Card
FLD Series
C
ARD
S
IGNAL
D
ESCRIPTION
ADDRESS INPUTS:
A
0
through A
25
enable direct addressing of up to 64MB of memory
on the card. Signal A
0
is not used in word access mode. A
25
is the most significant bit
DATA INPUT/OUTPUT:
DQ
0
THROUGH DQ
15
constitute the bi-directional databus.
CARD ENABLE 1 AND 2:
CE
1
enables even byte accesses, CE
2
enables odd byte
accesses. Multiplexing A
0
, CE
1
and CE
2
allows 8-bit hosts to access all data on DQ
0
- DQ
7
.
OUTPUT ENABLE:
Active low signal gating read data from the memory card.
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or program algorithms.
A high output indicates that the card is ready to accept accesses. A low output indicates
that one or more devices in the memory card are busy with internally timed erase or
write activities.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals are connected
to ground internally on the memory card. The host socket interface circuitry shall supply
10K-ohm or larger pull-up resistors on these signal pins.
WRITE PROTECT:
Write protect reflects the status of the Write Protect switch on the
memory card. WP set to high = write protected, providing internal hardware write lockout
to the Flash array.If card does not include optional write protect switch, this signal will be
pulled low internally indicating write protect = off.
PROGRAM/ERASE POWER SUPPLY:
Not connected for 5V only card.
CARD POWER SUPPLY:
5.0V for all internal circuitry.
GROUND:
for all internal circuitry.
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
ATTRIBUTE MEMORY SELECT :
provides access to Flash memory card registers and
Card Information Structure in the Attribute Memory Plane.
RESET:
Active high signal for placing card in Power-on default state. Reset can be used
as a Power-Down signal for the memory array.
WAIT:
This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain SRAM card
compatibility.
VOLTAGE SENSE:
Notifies the host socket of the cards V
CC
requirements. VS
1
and
VS
2
are open to indicate a 5V card has been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left floating
CD
1
, CD
2
OUTPUT
WP
OUTPUT
V
PP
1
, V
PP
2
V
CC
GND
REG
RST
WAIT
BVD
1
, BVD
2
VS
1
, VS
2
RFU
N.C.
N.C.
A
BSOLUTE
M
AXIMUM
R
ATINGS
(2)
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to V
SS
V
CC
supply Voltage relative to V
SS
** Advanced information
Notes:
(1) During transitions, inputs may undershoot to -2.0V or overshoot to V
CC
+2.0V for periods less than 20ns.
(2) Stress greater than those listed under Absolute Maximum ratings may cause permanent damage to the device.
This is a stress rating only and functional operation at these or any other conditions greater than those indicated in
the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
White Electronic Designs Corporation Marlborough MA (508) 485-4000
4
0°C to +60 °C
-40°C to +85 °C **
-30°C to +80 °C
-40°C to +85 °C **
-0.5V to V
CC
+0.5V (1)
-0.5V to +7.0V
White Electronic Designs
DC C
HARACTERISTICS
(1)
Sym
I
CCR
I
CCW
I
CCE
I
CCS
Parameter
V
CC
Read Current
V
CC
Program Current
V
CC
Erase Current
V
CC
Standby Current
Density
(Mbytes)
All
All
All
2MB
(4MB)
2,3
80
Notes
Typ
(4)
Max
75
150
150
230
Units
mA
mA
mA
µA
PCMCIA Flash Memory Card
FLD Series
Test Conditions
V
CC
= 5V +/- 10%
tcycle = 150ns
V
CC
= 5V +/- 10%
Control Signals = V
IL
or V
OH
Reset = V
SS
Test Conditions: V
CC
= 5V ± 10%, V
I
= V
IL
or V
IH
Notes:
1. All currents are RMS values unless otherwise specified. I
CCR
, I
CCW
and I
CCE
are based on Word wide operations.
2. Control Signals: CE
1
, CE
2
, OE, WE, REG.
3. I
CCD
and I
CCS
are specified for lowest density card for each component type (2MB for 8Mb components and 4MB for 16Mb components) This
represents a single pair of devices. For higher densities multiply the number of device pairs by the specified current in the table. For example a
40MB card will use 10 device pairs of 16Mb components. The maximum I
CCD
will be 10 x 40µA = 400µA. The maximum I
CCS
will be
10 x 230µA = 2.3mA.
4. Typical: V
CC
= 5V, T = +25°C.
Symbol
I
LI
I
LO
V
IL
V
IH
V
OL
V
OH
V
LKO
Parameter
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
CC
Erase/ProgramLock Voltage
Notes
1
1
1
1
1
1
1
Min
Max
±20
±20
Units
µA
µA
V
V
V
V
V
Test Conditions
V
CC
= 5V +/- 10%
V
IN
=V
CC
or V
SS
V
CC
= 5V +/- 10%
V
OUT
=V
CC
or V
SS
0
2
0.8
0.26
I
OL
= 4mA
I
OH
= -4mA
3.98
3.2
4.2
Notes:
1. Values are the same for byte and word wide modes for all card densities.
2. Exceptions: Leakage currents on CE
1
, CE
2
, OE, REG and WE will be < 500 µA when V
IN
= GND due to internal pull-up resistors. Leakage
currents on RST will be <150µA when V
IN
=V
CC
due to internal pull-down resistor.
5
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