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MC74LVX541DWR2

Description
LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOIC-20
Categorylogic   
File Size137KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric View All

MC74LVX541DWR2 Overview

LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOIC-20

MC74LVX541DWR2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeSOIC
package instructionSOIC-20
Contacts20
Reach Compliance Codenot_compliant
Is SamacsysN
Control typeENABLE LOW
seriesLV/LV-A/LVX/H
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length12.8 mm
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.004 A
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Prop。Delay @ Nom-Sup8 ns
propagation delay (tpd)12 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.7 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm
Base Number Matches1
MC74LVX541
Octal Bus Buffer
The MC74LVX541 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74LVX541 is a noninverting type. When either OE1 or OE2
are high, the terminal outputs are in the high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
http://onsemi.com
MARKING
DIAGRAMS
20
20
1
SOIC−20
DW SUFFIX
CASE 751D
1
LVX541
AWLYYWWG
High Speed: t
PD
= 5.0 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25°C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 3.6 V Operating Range
Low Noise: V
OLP
= 1.2 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
Chip Complexity: 134 FETs or 33.5 Equivalent Gates
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
These Devices are Pb−Free and are RoHS Compliant
20
20
1
TSSOP−20
DT SUFFIX
CASE 948E
1
LVX
541
ALYWG
G
20
1
20
SOEIAJ−20
M SUFFIX
CASE 967
1
LVX541
AWLYWWG
LVX541
A
WL, L
Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
May, 2011
Rev. 4
1
Publication Order Number:
MC74LVX541/D
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