AM29DL323GB90WMIN datasheet, PDF

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AM29DL323GB90WMIN: Description2M X 16 FLASH 3V PROM, 90 ns, PDSO48; Categorystorage storage; File Size865KB，58 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

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AM29DL323GB90WMIN Overview

2M X 16 FLASH 3V PROM, 90 ns, PDSO48

AM29DL323GB90WMIN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SPANSION
Parts packaging code	BGA
package instruction	6 X 12 MM, 0.80 MM PITCH, FBGA-48
Contacts	48
Reach Compliance Code	_compli
ECCN code	3A991.B.1.A
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
JESD-30 code	R-PBGA-B48
JESD-609 code	e0
length	12 mm
memory density	33554432 bi
Memory IC Type	FLASH
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of departments/size	8,63
Number of terminals	48
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA48,6X8,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	3/3.3 V
Programming voltage	3 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	8K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.045 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
switch bit	YES
type	NOR TYPE
width	6 mm

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Am29DL32xG

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not recommended for designs. For new and current designs,

S29JL032H (for TSOP packages) and S29PL032J (for FBGA packages) supersede AM29DL32xG as

the factory-recommended migration path. Please refer to each respective datasheets for specifica-

tions and ordering information. Availability of this document is retained for reference and historical

purposes only.

The following document contains information on Spansion memory products.

Continuity of Specifications

There is no change to this data sheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal data sheet improvement and are noted in the

document revision summary.

For More Information

Please contact your local sales office for additional information about Spansion memory solutions.

Publication Number

25686

Revision

Amendment

Issue Date

December 4, 2006

D A T A

S H E E T

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10

Table 1. Device Bus Operations ........................................................................................ 10

Unlock Bypass Command Sequence ................................... 26

Figure 3. Program Operation.............................................................................................. 26

Chip Erase Command Sequence ............................................ 26

Sector Erase Command Sequence ......................................... 27

Erase Suspend/Erase Resume Commands ............................ 27

Figure 4. Erase Operation................................................................................................... 28

Table 14. Command Definitions......................................................................................... 29

Write Operation Status . . . . . . . . . . . . . . . . . . . . 30

DQ7: Data# Polling .................................................................. 30

Figure 5. Data# Polling Algorithm....................................................................................... 30

Word/Byte Configuration .......................................................... 10

Requirements for Reading Array Data .....................................10

Writing Commands/Command Sequences ..............................11

Accelerated Program Operation ...........................................11

Autoselect Functions .............................................................11

Simultaneous Read/Write Operations

with Zero Latency .....................................................................11

Standby Mode .......................................................................... 11

Automatic Sleep Mode .............................................................11

RESET#: Hardware Reset Pin .................................................12

Output Disable Mode ...............................................................12

Table 2. Device Bank Divisions .......................................................................................... 12

Table 3. Top Boot Sector Addresses ...............................................................................13

Table 4. Top Boot Secured Silicon Sector Addresses .................................................... 14

Table 5. Bottom Boot Sector Addresses ........................................................................... 15

Table 6. Bottom Boot Secured Silicon Sector Addresses ............................................. 16

RY/BY#: Ready/Busy# ..............................................................31

DQ6: Toggle Bit I ..................................................................... 31

Figure 6. Toggle Bit Algorithm............................................................................................. 31

DQ2: Toggle Bit II .................................................................... 32

Reading Toggle Bits DQ6/DQ2 ................................................ 32

DQ5: Exceeded Timing Limits ................................................. 32

DQ3: Sector Erase Timer ........................................................ 32

Table 15. Write Operation Status .......................................................................................33

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34

Figure 7. Maximum Negative Overshoot Waveform....................................................... 34

Figure 8. Maximum Positive Overshoot Waveform......................................................... 34

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 9. I

CC1

Current vs. Time (Showing Active and Automatic Sleep Currents)...... 36

Figure 10. Typical I

CC1

vs. Frequency................................................................................ 36

Autoselect Mode ...................................................................... 17

Table 7. Autoselect Codes, (High Voltage Method) ....................................................... 17

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 11. Test Setup.......................................................................................................... 37

Figure 12. Input Waveforms and Measurement Levels.................................................. 37

Sector/Sector Block Protection and Unprotection .................... 18

Table 8. Top Boot Sector/Sector Block Addresses for Protection/Unprotection .........18

Table 9. Bottom Boot Sector/Sector Block Addresses for Protection/Unprotection ...18

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 13. Read Operation Timings................................................................................... 38

Figure 14. Reset Timings..................................................................................................... 39

Write Protect (WP#) .................................................................19

Temporary Sector Unprotect ....................................................19

Figure 1. Temporary Sector Unprotect Operation........................................................... 19

Figure 2. In-System Sector Protection/

Sector Unprotection Algorithms.......................................................................................... 20

Word/Byte Configuration (BYTE#) ........................................... 40

Figure 15. BYTE# Timings for Read Operations............................................................. 40

Figure 16. BYTE# Timings for Write Operations.............................................................. 40

Erase and Program Operations ............................................... 41

Figure 17. Program Operation Timings............................................................................. 42

Figure 18. Accelerated Program Timing Diagram........................................................... 42

Figure 19. Chip/Sector Erase Operation Timings............................................................ 43

Figure 20. Back-to-back Read/Write Cycle Timings........................................................ 44

Figure 21. Data# Polling Timings (During Embedded Algorithms)............................... 44

Figure 22. Toggle Bit Timings (During Embedded Algorithms)..................................... 45

Figure 23. DQ2 vs. DQ6...................................................................................................... 45

Secured Silicon Sector

Flash Memory Region ..............................................................21

Factory Locked: Secured Silicon Sector Programmed and Pro-

tected At the Factory .............................................................21

Customer Lockable: Secured Silicon Sector NOT Programmed

or Protected At the Factory ...................................................21

Hardware Data Protection ........................................................21

Low VCC Write Inhibit ...........................................................22

Write Pulse “Glitch” Protection ..............................................22

Logical Inhibit ........................................................................22

Power-Up Write Inhibit ..........................................................22

Temporary Sector Unprotect ................................................... 46

Figure 24. Temporary Sector Unprotect Timing Diagram.............................................. 46

Figure 25. Sector/Sector Block Protect and Unprotect Timing Diagram...................... 47

Alternate CE# Controlled Erase and Program Operations ...... 48

Figure 26. Alternate CE# Controlled Write (Erase/Program) Operation Timings........ 49

Common Flash Memory Interface (CFI) . . . . . . . 22

Table 10. CFI Query Identification String..........................................................................

Table 11. System Interface String......................................................................................

Table 12. Device Geometry Definition...............................................................................

Table 13. Primary Vendor-Specific Extended Query......................................................

Command Definitions . . . . . . . . . . . . . . . . . . . . . . 24

Reading Array Data ..................................................................24

Reset Command ......................................................................25

Autoselect Command Sequence ..............................................25

Enter Secured Silicon Sector/Exit Secured Silicon Sector Com-

mand Sequence .......................................................................25

Byte/Word Program Command Sequence ...............................25

Erase And Programming Performance . . . . . . .

Latchup Characteristics . . . . . . . . . . . . . . . . . . . .

TSOP Pin and Fine-Pitch BGA Capacitance. . . .

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . .

FBD063—63-ball Fine-Pitch Ball Grid Array (FBGA)

8 x 14 mm ................................................................................ 51

FBD048—Fine-Pitch Ball Grid Array, 6 x 12 mm ..................... 52

TS 048—Thin Small Outline Package ..................................... 53

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55

December 4, 2006 25686B10

Am29DL32xG

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