3D7444-4 datasheet, PDF - EEWORLD Datasheet

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3D7444-4: DescriptionQuad programmable 4-bit TTL/CMOS delay line; Categorylogic logic; File Size147KB，6 Pages; ManufacturerData Delay Devices

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3D7444-4 Overview

Quad programmable 4-bit TTL/CMOS delay line

3D7444-4 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP-14
Contacts	14
Reach Compliance Code	compli
Input frequency maximum value (fmax)	7.57 MHz
JESD-30 code	R-PDIP-T14
length	19.305 mm
Logic integrated circuit type	SILICON DELAY LINE
Number of functions	1
Number of taps/steps	15
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	YES
Certification status	Not Qualified
Maximum seat height	4.58 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	60 ns
width	7.62 mm
Base Number Matches	1

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3D7444

MONOLITHIC QUAD 4-BIT

PROGRAMMABLE DELAY LINE

(SERIES 3D7444)

FEATURES

•

Four indep’t programmable lines on a single chip

All-silicon CMOS technology

Low quiescent current (1mA typical)

Leading- and trailing-edge accuracy

Vapor phase, IR and wave solderable

Auto-insertable (DIP pkg.)

Increment range:

1.5ns through 25ns

Delay tolerance:

1ns or 2% (See Table 1)

Temperature stability:

±2%

typical (0C-70C)

Vdd stability:

±1%

typical

Minimum input pulse width:

10% of total delay

GND

PACKAGES

VDD

GND

VDD

DIP-14

3D7444-xx

SOIC-14

3D7444D-xx

For mechanical dimensions, click

here

For package marking details, click

here

FUNCTIONAL DESCRIPTION

The 3D7444 device is a small, versatile, quad 4-bit programmable

monolithic delay line. Delay values, programmed via the serial interface,

can be independently varied over 15 equal steps. The step size (in ns) is

determined by the device dash number. Each input is reproduced at the

corresponding output without inversion, shifted in time as per user

selection. For each line, the delay time is given by:

= T0 + A

* TI

PIN DESCRIPTIONS

I1-I4

O1-O4

VDD

GND

Signal Inputs

Signal Outputs

Address Latch In

Serial Clock In

Serial Data In

Serial Data Out

5.0V

Ground

where T0 is the inherent delay, A

is the delay address of the n-th line and

TI is the delay increment (dash number). The desired addresses are shifted into the device via the SC and

SI inputs, and the addresses are latched using the AL input. The serial interface can also be used to

enable/disable each delay line. The 3D7444 operates at 5 volts and has a typical T0 of 6ns. The 3D7444 is

CMOS-compatible, capable of sourcing or sinking 4mA loads, and features both rising- and falling-edge

accuracy. The device is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount

14-pin SOIC.

TABLE 1: PART NUMBER SPECIFICATIONS

PART

NUMBER

3D7444-1.5

3D7444-2

3D7444-4

3D7444-5

3D7444-8

3D7444-10

3D7444-15

3D7444-20

3D7444-25

DELAYS AND TOLERANCES (ns)

Delay

Increment

1.5

1.00

2.0

1.50

4.0

2.00

5.0

2.25

8.0

3.00

4.00

6.00

7.00

Total

Delay

22.5

1.0

30.0

1.0

60.0

1.2

75.0

1.5

120

2.4

150

3.0

225

4.5

300

6.0

375

7.5

Inherent

Delay

2.0

INPUT RESTRICTIONS

Max Freq. (MHz)

Recommended

Absolute

20.0

166

13.8

166

7.57

83.3

6.17

66.6

3.96

41.6

3.20

33.3

2.16

22.2

1.63

16.6

1.31

13.3

Min P.W. (ns)

Recommended

Absolute

25.0

3.0

36.0

3.0

66.0

6.0

81.0

7.5

126.0

12.0

156.0

15.0

231.0

22.5

306.0

30.0

381.0

37.5

2003

Data Delay Devices

NOTES: Any increment between 1.5 and 25 ns not shown is also available as standard

Total delay is given by delay at address 15 minus delay at address 0

Doc #03006

12/8/03

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

3D7444-4 Related Products

	3D7444-4	3D7444	3D7444-1.5	3D7444-2	3D7444-25	3D7444-8	3D7444-15	3D7444-5	3D7444-20	3D7444-10
Description	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line	Quad programmable 4-bit TTL/CMOS delay line
Is it lead-free?	Contains lead	-	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	-	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	-	DIP	DIP	DIP	DIP	DIP	DIP	DIP	DIP
package instruction	DIP-14	-	DIP,	DIP,	DIP,	DIP,	DIP,	DIP-14	DIP,	DIP,
Contacts	14	-	14	14	14	14	14	14	14	14
Reach Compliance Code	compli	-	compli	compli	compli	compli	compli	compli	compli	compli
Input frequency maximum value (fmax)	7.57 MHz	-	20 MHz	13.8 MHz	1.31 MHz	3.96 MHz	2.16 MHz	6.17 MHz	1.63 MHz	3.2 MHz
JESD-30 code	R-PDIP-T14	-	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14	R-PDIP-T14
length	19.305 mm	-	19.305 mm	19.305 mm	19.305 mm	19.305 mm	19.305 mm	19.305 mm	19.305 mm	19.305 mm
Logic integrated circuit type	SILICON DELAY LINE	-	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE	SILICON DELAY LINE
Number of functions	1	-	1	1	1	1	1	1	1	1
Number of taps/steps	15	-	15	15	15	15	15	15	15	15
Number of terminals	14	-	14	14	14	14	14	14	14	14
Maximum operating temperature	70 °C	-	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Output polarity	TRUE	-	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	-	DIP	DIP	DIP	DIP	DIP	DIP	DIP	DIP
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	-	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
programmable delay line	YES	-	YES	YES	YES	YES	YES	YES	YES	YES
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.58 mm	-	4.58 mm	4.58 mm	4.58 mm	4.58 mm	4.58 mm	4.58 mm	4.58 mm	4.58 mm
Maximum supply voltage (Vsup)	5.25 V	-	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage (Vsup)	4.75 V	-	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
Nominal supply voltage (Vsup)	5 V	-	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	-	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	-	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	-	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	-	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	-	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Total delay nominal (td)	60 ns	-	22.5 ns	30 ns	375 ns	120 ns	225 ns	75 ns	300 ns	150 ns
width	7.62 mm	-	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm
Base Number Matches	1	-	1	1	1	1	1	1	1	1

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