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EL32D1EEA2K-125.000M

Description
VCXO, CLOCK, 125MHz, LVDS OUTPUT, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN
Categoryoscillator   
File Size134KB,2 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance  
Download Datasheet Parametric View All

EL32D1EEA2K-125.000M Overview

VCXO, CLOCK, 125MHz, LVDS OUTPUT, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN

EL32D1EEA2K-125.000M Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerECLIPTEK
Reach Compliance Codecompliant
Is SamacsysN
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; BULK; COMPLEMENTARY OUTPUT
Maximum control voltage3.3 V
Minimum control voltage
maximum descent time1 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate75 ppm
frequency stability25%
JESD-609 codee4
linearity20%
Manufacturer's serial numberEL32D1
Installation featuresSURFACE MOUNT
Nominal operating frequency125 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeLVDS
Output load100 OHM, 10 pF
physical size7.0mm x 5.0mm x 2.0mm
longest rise time1 ns
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
EL32D1
Series
• Voltage Controlled Crystal Oscillators (VCXO)
• LVDS Output
• +3.3V Supply Voltage
• Complementary Output
• Tri-State Output Function (Pad 2)
• External Voltage Control Function
• 6 Pad Ceramic SMD Package
• RoHS Compliant (Pb-Free)
ELECTRICAL SPECIFICATIONS
Frequency Range (MHz)
Operating Temperature Range
Storage Temperature Range
Supply Voltage (V
CC
)
Differential Output Voltage (V
OD
)
Input Current
Frequency Tolerance / Stability
EL32D1
H
L
W
2.0
7.0
5.0
OSCILLATOR
Output Voltage Logic High (V
OH
)
Output Voltage Logic Low (V
OL
)
V
DD
Magnitude Change (
D
V
OD
)
Offset Voltage (V
OS
)
Rise Time / Fall Time
Duty Cycle
Offset Voltage Magnitude Change (
D
V
OS
)
Load Drive Capability
Control Voltage (V
C
)
Control Voltage Range (V
CR
)
Frequency Deviation
Linearity
Transfer Function
Modulation Bandwidth (MBW)
Input Impedance (Z
I
)
Typical Phase Noise (Fo = 155.520MHz)
Logic Control/Additional Output
Tri-State Input Voltage
RMS Phase Jitter
Accumulated Period Jitter (t
acc
)
Period Jitter (t
rj
)
Period Jitter (t
rms
)
Period Jitter (t
dj
)
Period Jitter (t
p-p
)
Start Up Time
MANUFACTURER
CATEGORY
50, 51.84, 52, 52.08, 54, 57.1429, 61.44, 63.36, 65.536, 76.8, 77.76, 100, 104, 106.25, 122.88, 125, 126.72,
128, 153.6, 155.52, 156.25, 159.375, 161.1328, 166.6286, 167.3315, 184.32, 186.666, 200MHz
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
3.3V
DC
±5%
247mV Minimum, 355mV Typical, 454mV Maximum
80mA Maximum
Inclusive of all conditions: Calibration Tolerance at 25°C,
±50ppm or ±25ppm Maximum
Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, 1st Year Aging,
Shock, and Vibration
1.43V
DC
Typical, 1.6V
DC
Maximum
1.1V
DC
Typical, 0.9V
DC
Minimum
-50mV Minimum, +50mV Maximum
1.125V Minimum, 1.20V Typical, 1.375V Maximum
20% to 80% of waveform
1 nSeconds Maximum
at 50% of waveform
50 ±10(%)
50 ±5(%)
25mV Maximum
Between Output and Complementary Output
100 Ohms and 10pF
Test Conditions for Frequency Deviation
1.65V
DC
±1.65V
DC
0.0V
DC
to V
CC
+0.5V
DC
Inclusive of Operating Temperature Range, Supply
±75ppm Minimum
Voltage Change, and Output Load Change
20%, 15%, or 10% Maximum
Positive Transfer Characteristic
Measured at -3dB with Contol Voltage of +1.65V
DC
10kHz Minimum
50kOhms Typical
at 10Hz Offset
-55dBc/Hz
at 100Hz Offset
-90dBc/Hz
at 1kHz Offset
-120dBc/Hz
at 10kHz Offset
-140dBc/Hz
at 100kHz Offset
-145dBc/Hz
at 1MHz Offset
-148dBc/Hz
Tri-State Enable High / Complementary Output
V
IH
of 70% of V
CC
Minimum
Enables Output
No Connection
Enables Output
V
IL
of 30% of V
CC
Maximum
Disables Outputs: High Impedance
FJ = 12kHz to 20MHz
0.4pSec Typical, 1 pSec Maximum
Sigma of Total Jitter Distribution
4pSec Typical, 5pSec Maximum
Sigma of Random Jitter
3pSec Typical, 5pSec Maximum
Sigma of Total Jitter Distribution
3pSec Typical, 5pSec Maximum
Deterministic Jitter
4pSec Typical, 10pSec Maximum
Peak to Peak of Jitter Distribution
27pSec Typical, 40pSec Maximum
10mSec Maximum
SERIES
PACKAGE
VOLTAGE
CLASS
REV
.
DATE
ECLIPTEK CORP.
OSCILLATOR
EL32D1
CERAMIC
3.3V
OS3Z
01/11
800-ECLIPTEK www.ecliptek.com for latest revision
Specifications subject to change without notice.
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