DS1743P-85 datasheet, PDF - EEWORLD Datasheet

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DS1743P-85: DescriptionReal Time Clock, Non-Volatile, 0 Timer(s), CMOS, POWERCAP MODULE-34; CategoryThe embedded processor and controller Microcontrollers and processors; File Size199KB，16 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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DS1743P-85 Overview

Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, POWERCAP MODULE-34

DS1743P-85 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Maxim
Parts packaging code	DMA
package instruction	, MODULE,34LEAD,1.0
Contacts	34
Reach Compliance Code	not_compliant
ECCN code	EAR99
Is Samacsys	N
Other features	A POWERCAP MODULE CONTAINING CRYSTAL AND BATTERY REQUIRED
maximum clock frequency	0.032 MHz
External data bus width	8
Information access methods	PARALLEL, DIRECT ADDRESS
interrupt capability	N
JESD-30 code	R-XDMA-U34
JESD-609 code	e0
Number of terminals	34
Number of timers
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
Encapsulate equivalent code	MODULE,34LEAD,1.0
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	J INVERTED
Terminal location	DUAL
shortest time	SECONDS
Maximum time at peak reflow temperature	NOT SPECIFIED
Volatile	NO
uPs/uCs/peripheral integrated circuit type	TIMER, REAL TIME CLOCK
Base Number Matches	1

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DS1743/DS1743P

Y2K-Compliant, Nonvolatile Timekeeping

RAMs

www.maxim-ic.com

FEATURES



Integrated NV SRAM, Real-Time Clock,

Crystal, Power-Fail Control Circuit, and

Lithium Energy Source

Clock Registers are Accessed Identically to

the Static RAM. These Registers Reside in

the Eight Top RAM Locations.

Century Byte Register

Totally Nonvolatile with Over 10 Years of

Operation in the Absence of Power

BCD-Coded Century, Year, Month, Date,

Day, Hours, Minutes, and Seconds with

Automatic Leap Year Compensation Valid

through 2099

Low-Battery-Voltage Level Indicator Flag

Power-Fail Write Protection Allows for ±10%

Power-Supply Tolerance

Lithium Energy Source is Electrically

Disconnected to Retain Freshness Until

Power is Applied for the First Time

DIP Module Only

Standard JEDEC Bytewide 8k x 8 Static

RAM Pinout

PowerCap Module Board Only

Surface-Mountable Package for Direct

Connection to PowerCap Containing

Battery and Crystal

Replaceable Battery (PowerCap)

Power-On Reset Output

Pin-for-Pin Compatible with Other Densities

of DS174XP Timekeeping RAM

Underwriters Laboratories (UL) Recognized

to Prevent Charging of the Internal Lithium

Battery

PIN CONFIGURATIONS

TOP VIEW

N.C.

A12

DQ0

DQ1

DQ2

GND

DS1743

CE2

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3



28-Pin Encapsulated Package

(28 PIN 740)

N.C.

RST

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

DS1743P

GND

BAT

N.C.

A12

A11

A10

34-Pin PowerCap Module Board

(Uses DS9034PCX PowerCap)



Note:

Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here:

www.maxim-ic.com/errata.

1 of 16

REV

: 090407

DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs

PACKAGES

The DS1743 is available in two packages: the 28-pin DIP and the 34-pin PowerCap module. The 28-pin

DIP-style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin

PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX)

that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the

DS1743P after the completion of the surface-mount process. Mounting the PowerCap after the surface-

mount process prevents damage to the crystal and battery due to the high temperatures required for solder

reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap

are ordered separately and shipped in separate containers. The part number for the PowerCap is

DS9034PCX.

TIME AND DATE OPERATION

The time and date information is obtained by reading the appropriate register bytes. Table 2 shows the

RTC registers. The time and date are set or initialized by writing the appropriate register bytes. The

contents of the time and date registers are in the BCD format. The day-of-week register increments at

midnight. Values that correspond to the day of week are user-defined, but must be sequential (i.e., if 1

equals Sunday, then 2 equals Monday and so on). Illogical time and date entries result in undefined

operation.

CLOCK OPERATIONS-READING THE CLOCK

While the double-buffered register structure reduces the chance of reading incorrect data, internal updates

to the DS1743 clock registers should be halted before clock data is read to prevent reading of data in

transition. However, halting the internal clock register updating process does not affect clock accuracy.

Updating is halted when a 1 is written into the read bit, bit 6 of the century register (see Table 2). As long

as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count that

is day, date, and time that was current at the moment the halt command was issued. However, the internal

clock registers of the double-buffered system continue to update so that the clock accuracy is not affected

by the access of data. All the DS1743 registers are updated simultaneously after the internal clock register

updating process has been re-enabled. Updating is within a second after the read bit is written to 0.

The READ bit must be a zero for a minimum of 500s to ensure the external registers are updated.

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DS1743P-85 Related Products

	DS1743P-85	DS90340I-PCX	DS1743W-150IND
Description	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, POWERCAP MODULE-34	IC sram NV timekeeping powercap	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, EDIP MODULE-28
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	Maxim	Maxim	Maxim
Parts packaging code	DMA	DMA	MODULE
package instruction	, MODULE,34LEAD,1.0	, MODULE,34LEAD,1.0	EDIP MODULE-28
Contacts	34	34	28
Reach Compliance Code	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99
maximum clock frequency	0.032 MHz	0.032 MHz	0.032 MHz
External data bus width	8	8	8
Information access methods	PARALLEL, DIRECT ADDRESS	PARALLEL, DIRECT ADDRESS	PARALLEL, DIRECT ADDRESS
interrupt capability	N	N	N
JESD-30 code	R-XDMA-U34	R-XDMA-U34	R-XDMA-P28
JESD-609 code	e0	e0	e0
Number of terminals	34	34	28
Maximum operating temperature	70 °C	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Encapsulate equivalent code	MODULE,34LEAD,1.0	MODULE,34LEAD,1.0	DIP28,.6
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	3.3/5 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage	5.5 V	5.5 V	3.63 V
Minimum supply voltage	4.5 V	4.5 V	2.97 V
Nominal supply voltage	5 V	5 V	3.3 V
surface mount	YES	YES	NO
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J INVERTED	J INVERTED	PIN/PEG
Terminal location	DUAL	DUAL	DUAL
shortest time	SECONDS	SECONDS	SECONDS
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Volatile	NO	NO	NO
uPs/uCs/peripheral integrated circuit type	TIMER, REAL TIME CLOCK	TIMER, REAL TIME CLOCK	TIMER, REAL TIME CLOCK
Is it lead-free?	Contains lead	Contains lead	-

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