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Datasheet> All Categories > semiconductor> logic> ADS8481IBRGZTG4
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ADS8481IBRGZTG4

Description
1-CH 18-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC48
Categorysemiconductor    logic   
File Size710KB，31 Pages
ManufacturerBurr-Brown
Websitehttp://www.burr-brown.com/
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ADS8481IBRGZTG4 Overview

1-CH 18-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC48

ADS8481IBRGZTG4 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals48
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Rated supply voltage5 V
Maximum conversion time0.7100 uS
Maximum linear error0.0013 %
Maximum limit analog input voltage4.2 V
Minimum limit analog input voltage0.0 V
Processing package description7 X 7 MM, GREEN, PLASTIC, QFN-48
Lead-freeYes
EU RoHS regulationsYes
China RoHS regulationsYes
stateACTIVE
packaging shapeSQUARE
Package SizeCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
surface mountYes
Terminal formNO LEAD
Terminal spacing0.5000 mm
terminal coatingNICKEL PALLADIUM GOLD
Terminal locationQUAD
Packaging MaterialsPLASTIC/EPOXY
Temperature levelINDUSTRIAL
Sampling Rate1 MHz
Output formatPARALLEL, 8 BITS, PARALLEL, WORD
Type of converterSUCCESSIVE APPROXIMATION
Number of digits18
Output bit encodingBINARY
Number of analog channels1
Sample and hold and track and holdSAMPLE

ADS8481IBRGZTG4 Preview

Burr Brown Products
from Texas Instruments
ADS8481
SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006
18-BIT, 1-MSPS, PSEUDO-DIFFERENTIAL UNIPOLAR INPUT, MICROPOWER SAMPLING
ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE AND REFERENCE
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
0 to 1 MSPS Sampling Rate
18-Bit NMC Ensured Over Temperature
Low ±0.1 mV Offset Error
Low 0.2 ppm/°C Offset Error Temperature
Drift
Low 0.6 ppm/°C Gain Error Temperature Drift
Zero Latency
Low Power: 220 mW at 1 MSPS
Unipolar Single-Ended Input Range: 0 V to
V
ref
Onboard Reference
Onboard Reference Buffer
High-Speed Parallel Interface
Wide Digital Supply 2.7 V ~ 5.25 V
8-/16-/18-Bit Bus Transfer
7x7 QFN Package
APPLICATIONS
•
•
•
•
•
Medical Instruments
Optical Networking
Transducer Interface
High Accuracy Data Acquisition Systems
Magnetometers
DESCRIPTION
The ADS8481 is an 18-bit, 1-MSPS A/D converter
with an internal 4.096-V reference and a
pseudo-differential unipolar single-ended input. The
device includes a 18-bit capacitor-based SAR A/D
converter with inherent sample and hold. The
ADS8481 offers a full 18-bit interface, a 16-bit option
where data is read using two read cycles, or an 8-bit
bus option using three read cycles.
The ADS8481 is available in a 7x7 QFN package
and is characterized over the industrial –40°C to
85°C temperature range.
HIGH SPEED SAR CONVERTER FAMILY
TYPE/SPEED
18-Bit Pseudo-Diff
18-Bit Pseudo-Bipolar, Fully Diff
16-Bit Pseudo-Diff
16-Bit Pseudo-Bipolar, Fully Diff
14-Bit Pseudo-Diff
12-Bit Pseudo-Diff
ADS7886
500 kHz
ADS8383
580 kHz
ADS8381
ADS8380(S)
ADS8382(S)
ADS8371
ADS8482
ADS8471
ADS8472
ADS8401
ADS8405
ADS8402
ADS8406
ADS7890 (s)
ADS7883
ADS7891
ADS7881
ADS8412
ADS8411
750 kHz
1 MHz
ADS8481
1.25 MHz
2 MHz
3 MHz
4MHz
SAR
+IN
−IN
REFIN
4.096-V
Internal
Reference
+
_
CDAC
Comparator
Output
Latches
and
3-State
Drivers
BYTE
16-/8-Bit
Parallel DATA
Output Bus
BUS 18/16
CONVST
BUSY
CS
RD
REFOUT
Clock
Conversion
and
Control Logic
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
ADS8481
www.ti.com
SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
MODEL
MAXIMUM
INTEGRAL
LINEARITY
(LSB)
MAXIMUM
DIFFERENTIAL
LINEARITY (LSB)
NO MISSING
CODES
RESOLUTION
(BIT)
PACKAGE
TYPE
PACKAGE
DESIGNATOR
TEMPER-
ATURE
RANGE
ORDERING
INFORMATION
ADS8482IRGZT
ADS8481I
±5
–1 to +2.5
18
7x7 48 Pin
QFN
RGZ
–40°C to
85°C
ADS8481IRGZR
ADS8481IBRGZT
ADS8481IB
±3.5
–1 to +1.5
18
7x7 48 Pin
QFN
RGZ
–40°C to
85°C
ADS8481IBRGZR
TRANS-
PORT
MEDIA
QTY.
Tape and
reel 250
Tape and
reel 1000
Tape and
reel 250
Tape and
reel 1000
(1)
For the most current specifications and package information, refer to our website at
www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
+IN to AGND
–IN to AGND
Voltage
+VA to AGND
+VBD to BDGND
+VA to +VBD
Digital input voltage to BDGND
Digital output voltage to BDGND
T
A
T
stg
Operating free-air temperature range
Storage temperature range
Junction temperature (T
J
max)
QFN package
Lead temperature, soldering
(1)
Power dissipation
θ
JA
thermal impedance
Vapor phase (60 sec)
Infrared (15 sec)
–0.4 to +VA + 0.1
–0.4 to 0.5
–0.3 to 7
–0.3 to 7
–0.3 to 2.55
–0.3 to +VBD + 0.3
–0.3 to +VBD + 0.3
–40 to 85
–65 to 150
150
(T
J
Max – T
A
)/θ
JA
22
215
220
°C/W
°C
°C
UNIT
V
V
V
V
V
V
V
°C
°C
°C
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
Submit Documentation Feedback
ADS8481
www.ti.com
SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006
SPECIFICATIONS
T
A
= –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, V
ref
= 4.096 V, f
SAMPLE
= 1 MSPS (unless otherwise noted)
PARAMETER
ANALOG INPUT
Full-scale input voltage
(1)
Absolute input voltage
Input capacitance
Input leakage current
SYSTEM PERFORMANCE
Resolution
No missing codes
Integral linearity
(2) (3)
Differential linearity
Offset error
(4)
Offset error temperature drift
Gain error
(4) (5)
Gain error temperature drift
Noise
Power supply rejection ratio
SAMPLING DYNAMICS
Conversion time
Acquisition time
Throughput rate
Aperture delay
Aperture jitter
Step response
Over voltage recovery
(1)
(2)
(3)
(4)
(5)
Ideal input span, does not include gain or offset error.
LSB means least significant bit
This is endpoint INL, not best fit.
Measured relative to an ideal full-scale input [+IN – (–IN)] of 4.096 V
This specification does not include the internal reference voltage error and drift.
4
5
150
150
250
1
650
710
ns
ns
MHz
ns
ps
ns
ns
At 3FFFFh output code
ADS8481I
ADS8481IB
V
ref
= 4.096 V
V
ref
= 4.096 V
–0.075
–0.075
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
18
18
18
–5 –1.5/+1.9
–3.5 –1.5/+1.9
–1 –0.5/+0.7
–1 –0.5/+0.7
–0.5
–0.5
±0.1
±0.1
±0.2
±0.05
±0.05
±0.6
30
60
0.075
0.075
5
3.5
2.5
1.5
0.5
0.5
18
Bits
Bits
LSB
(18 bit)
LSB
(18 bit)
mV
ppm/°C
%FS
%FS
ppm/°C
µV
RMS
dB
+IN – (–IN)
+IN
–IN
0
–0.2
–0.2
65
1
V
ref
V
ref
+0.2
0.2
V
V
pF
nA
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Submit Documentation Feedback
3
ADS8481
www.ti.com
SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006
SPECIFICATIONS (Continued)
T
A
= –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, V
ref
= 4.096 V, f
SAMPLE
= 1 MSPS (unless otherwise noted)
PARAMETER
DYNAMIC CHARACTERISTICS
ADS8481I
ADS8481IB
Total harmonic distortion (THD)
(1)
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
Signal to noise ratio (SNR)
(1)
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
Signal to noise + distortion (SINAD)
(1)
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
Spurious free dynamic range (SFDR)
(1)
ADS8481I
ADS8481IB
ADS8481I
ADS8481IB
–3dB Small signal bandwidth
VOLTAGE REFERENCE INPUT
Reference voltage at REFIN, Vref
Reference resistance
(2)
Reference current drain
(1)
(2)
f
s
= 1 MHz
3.0
4.096
500
1
4.2
V
kΩ
mA
V
IN
= 4 V
pp
at 1 kHz
V
IN
= 4 V
pp
at 10 kHz
V
IN
= 4 V
pp
at 100 kHz
V
IN
= 4 V
pp
at 1 kHz
V
IN
= 4 V
pp
at 10 kHz
V
IN
= 4 V
pp
at 100 kHz
V
IN
= 4 V
pp
at 1 kHz
V
IN
= 4 V
pp
at 10 kHz
V
IN
= 4 V
pp
at 100 kHz
V
IN
= 4 V
pp
at 1 kHz
V
IN
= 4 V
pp
at 10 kHz
V
IN
= 4 V
pp
at 100 kHz
–110
–112
–106
–108
–98
–99
92
94
91
93
90
92
91
93
90
92
89
91
110
112
108
107
98
98
15
MHz
dB
dB
dB
dB
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Calculated on the first nine harmonics of the input frequency.
Can vary ±20%
4
Submit Documentation Feedback
ADS8481
www.ti.com
SLAS385A – FEBRUARY 2006 – REVISED MARCH 2006
SPECIFICATIONS (Continued)
T
A
= –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, V
ref
= 4.096 V, f
SAMPLE
= 1 MSPS (unless otherwise noted)
PARAMETER
INTERNAL REFERENCE OUTPUT
Internal reference start-up time
Reference voltage range, V
ref
Source current
Line regulation
Drift
DIGITAL INPUT/OUTPUT
Logic family – CMOS
V
IH
Logic level
V
IL
V
OH
V
OL
Data format – Straight Binary
POWER SUPPLY REQUIREMENTS
Power supply
voltage
Supply current
(1)
Power dissipation
(1)
TEMPERATURE RANGE
Operating free-air
(1)
–40
85
°C
+VBD
+VA
f
s
= 1 MHz
f
s
= 1 MHz
2.7
4.75
3.3
5
44
220
5.25
5.25
48
240
V
V
mA
mW
I
IH
= 5
µA
I
IL
= 5
µA
I
OH
= 2 TTL loads
I
OL
= 2 TTL loads
+VBD–1
–0.3
+V
BD
– 0.6
0.4
+V
BD
+0.3
0.8
V
From 95% (+VA), with 1-µF storage capacitor
I
O
= 0 A
Static load
+VA = 4.75 V to 5.25 V
I
O
= 0 A
60
±6
4.081
4.096
120
4.111
10
ms
V
µA
µV
PPM/C
TEST CONDITIONS
MIN
TYP
MAX
UNIT
This includes only +VA current. +VBD current is typical 1 mA with 5 pF load capacitance on all output pins.
Submit Documentation Feedback
5
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