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MC74VHCT32AD

Description
QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER
Categorylogic    logic   
File Size133KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

MC74VHCT32AD Overview

QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER

MC74VHCT32AD Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeSOIC
package instructionSOP, SOP14,.25
Contacts14
Reach Compliance Code_compli
seriesAHCT/VHCT
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length8.65 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOR GATE
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingRAIL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Prop。Delay @ Nom-Su8.5 ns
propagation delay (tpd)13 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
MC74VHCT32A
Quad 2-Input OR Gate /
CMOS Logic Level Shifter
with LSTTL
Compatible Inputs
The MC74VHCT32A is an advanced high speed CMOS 2−input
OR gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5.0 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic−level translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic
to 3.0 V CMOS Logic while operating at the high−voltage power
supply.
The MC74VHCT32A input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHCT32A to be used to interface 5.0 V circuits to
3.0 V circuits. The output structures also provide protection when
V
CC
= 0 V. These input and output structures help prevent device
destruction caused by supply voltage
input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
VHCT32AG
AWLYWW
1
14
TSSOP−14
DT SUFFIX
CASE 948G
1
1
VHCT
32A
ALYW
G
G
14
SOEIAJ−14
M SUFFIX
CASE 965
1
74VHCT32
ALYWG
High Speed: t
PD
= 3.8 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
These Devices are Pb−Free and are RoHS Compliant
1
A
WL, L
Y
WW, W
G or
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
†For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
May, 2011
Rev. 4
1
Publication Order Number:
MC74VHCT32A/D

MC74VHCT32AD Related Products

MC74VHCT32AD MC74VHCT32A MC74VHCT32ADT
Description QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER
Is it Rohs certified? incompatible - conform to
Maker ON Semiconductor - ON Semiconductor
Parts packaging code SOIC - TSSOP
package instruction SOP, SOP14,.25 - TSSOP, TSSOP14,.25
Contacts 14 - 14
Reach Compliance Code _compli - unknow
series AHCT/VHCT - AHCT/VHCT
JESD-30 code R-PDSO-G14 - R-PDSO-G14
JESD-609 code e0 - e4
length 8.65 mm - 5 mm
Load capacitance (CL) 50 pF - 50 pF
Logic integrated circuit type OR GATE - OR GATE
MaximumI(ol) 0.008 A - 0.008 A
Humidity sensitivity level 1 - 1
Number of functions 4 - 4
Number of entries 2 - 2
Number of terminals 14 - 14
Maximum operating temperature 85 °C - 85 °C
Minimum operating temperature -55 °C - -55 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code SOP - TSSOP
Encapsulate equivalent code SOP14,.25 - TSSOP14,.25
Package shape RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing RAIL - RAIL
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
power supply 5 V - 5 V
Prop。Delay @ Nom-Su 8.5 ns - 8.5 ns
propagation delay (tpd) 13 ns - 13 ns
Certification status Not Qualified - Not Qualified
Schmitt trigger NO - NO
Maximum seat height 1.75 mm - 1.2 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V
Minimum supply voltage (Vsup) 2 V - 2 V
Nominal supply voltage (Vsup) 3.3 V - 3.3 V
surface mount YES - YES
technology CMOS - CMOS
Temperature level OTHER - OTHER
Terminal surface Tin/Lead (Sn/Pb) - Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING - GULL WING
Terminal pitch 1.27 mm - 0.65 mm
Terminal location DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
width 3.9 mm - 4.4 mm
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