SAM C20/C21
32-bit ARM Cortex-M0+ with 5V Support, CAN-FD, PTC,
and Advanced Analog
Features
Operating Conditions
•
2.7V – 5.5V, -40°C to +105°C, DC to 48 MHz
Core
•
ARM
®
Cortex
®
-M0+ CPU running at up to 48 MHz
– Single-cycle hardware multiplier
–
–
Memories
•
•
•
32/64/128/256 KB in-system self-programmable Flash
1/2/4/8 KB independent self-programmable Flash for EEPROM emulation
4/8/16/32 KB SRAM Main Memory
Micro Trace Buffer
Memory Protection Unit (MPU)
System
•
Power-on Reset (POR) and Brown-out Detection (BOD)
•
Internal and external clock options with 48 MHz to 96 MHz Fractional Digital Phase Locked Loop
(FDPLL96M)
•
External Interrupt Controller (EIC) (Interrupt pin debouncing is only available in SAM C21N)
•
16 external interrupts
– Hardware debouncing (only on the 100Pin TQFP)
•
One non-maskable interrupt
•
Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
Low-Power
•
Idle and Standby Sleep modes
•
SleepWalking peripherals
Peripherals
•
Hardware Divide and Square Root Accelerator (DIVAS)
•
12-channel Direct Memory Access Controller (DMAC)
•
12-channel Event System
•
Up to eight 16-bit Timer/Counters (TC), configurable as either (see
Note):
Note:
Maximum and minimum capture is only available in SAM C21N devices.
–
–
–
One 16-bit TC with compare/capture channels
One 8-bit TC with compare/capture channels
One 32-bit TC with compare/capture channels, by using two TCs
©
2017 Microchip Technology Inc.
Datasheet Complete
DS60001479B-page 1
SAM C20/C21
•
Two 24-bit Timer/Counters and one 16-bit Timer/Counter for Control (TCC), with extended functions:
– Up to four compare channels with optional complementary output
– Generation of synchronized pulse width modulation (PWM) pattern across port pins
– Deterministic fault protection, fast decay and configurable dead-time between complementary
output
– Dithering that increase resolution with up to 5 bit and reduce quantization error
Frequency Meter (The division reference clock is only available in the SAM C21N)
32-bit Real Time Counter (RTC) with clock/calendar function
Watchdog Timer (WDT)
CRC-32 generator
Up to two Controller Area Network (CAN) interfaces:
– CAN 2.0A/B
CAN-FD 1.0
• Each CAN interface have two selectable pin locations to switch between two external CAN
transceivers (without the need for an external switch)
Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either:
–
–
USART with full-duplex and single-wire half-duplex configuration
I
2
C up to 3.4 MHz (Except SERCOM6 and SERCOM7)
–
•
•
•
•
•
•
•
•
•
•
•
•
•
I/O
•
– SPI
– LIN master/slave
– RS-485
– PMBus
One Configurable Custom Logic (CCL)
Up to Two 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 12 channels each (20 unique
channels)
– Differential and single-ended input
– Automatic offset and gain error compensation
– Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
One 16-bit Sigma-Delta Analog-to-Digital Converter (SDADC) with up to 3 differential channels
10-bit, 350 ksps Digital-to-Analog Converter (DAC)
Up to four Analog Comparators (AC) with Window Compare function
Integrated Temperature Sensor
Peripheral Touch Controller (PTC)
– 256-Channel capacitive touch and proximity sensing
Up to 84 programmable I/O pins
Packages
•
100-pin TQFP
•
64-pin TQFP, QFN
•
56-pin WLCSP
•
48-pin TQFP, QFN
•
32-pin TQFP, QFN
General
©
2017 Microchip Technology Inc.
Datasheet Complete
DS60001479B-page 2
SAM C20/C21
•
Drop in compatible with SAM D20 and SAM D21 (see
Note)
Note:
Only applicable for 32-, 48-, and 64-pin TQFP and QFN packages.
©
2017 Microchip Technology Inc.
Datasheet Complete
DS60001479B-page 3
SAM C20/C21
Table of Contents
Features.......................................................................................................................... 1
1. Configuration Summary...........................................................................................14
2. Ordering Information................................................................................................19
3. Block Diagram......................................................................................................... 20
4. Pinout...................................................................................................................... 22
4.1.
4.2.
4.3.
4.4.
SAM C21E / SAM C20E.............................................................................................................22
SAM C21G / SAM C20G............................................................................................................ 23
SAM C21J / SAM C20J.............................................................................................................. 24
SAM C21N / SAM C20N............................................................................................................ 26
5. Signal Descriptions List........................................................................................... 27
6. I/O Multiplexing and Considerations........................................................................29
6.1.
6.2.
Multiplexed Signals.................................................................................................................... 29
Other Functions..........................................................................................................................35
7. Power Supply and Start-Up Considerations............................................................ 38
7.1.
7.2.
7.3.
7.4.
Power Domain Overview............................................................................................................38
Power Supply Considerations.................................................................................................... 39
Power-Up................................................................................................................................... 41
Power-On Reset and Brown-Out Detector................................................................................. 42
8. Product Mapping..................................................................................................... 43
9. Memories.................................................................................................................47
9.1.
9.2.
9.3.
9.4.
9.5.
9.6.
Embedded Memories................................................................................................................. 47
Physical Memory Map................................................................................................................ 47
NVM User Row Mapping............................................................................................................48
NVM Software Calibration Area Mapping...................................................................................49
NVM Temperature Calibration Area Mapping, SAM C21........................................................... 50
Serial Number............................................................................................................................ 51
10. Processor and Architecture..................................................................................... 52
10.1.
10.2.
10.3.
10.4.
Cortex M0+ Processor............................................................................................................... 52
Nested Vector Interrupt Controller..............................................................................................54
Micro Trace Buffer...................................................................................................................... 57
High-Speed Bus System............................................................................................................ 58
11. PAC - Peripheral Access Controller.........................................................................61
11.1. Overview.................................................................................................................................... 61
11.2. Features..................................................................................................................................... 61
11.3. Block Diagram............................................................................................................................ 61
©
2017 Microchip Technology Inc.
Datasheet Complete
DS60001479B-page 4
SAM C20/C21
11.4.
11.5.
11.6.
11.7.
Product Dependencies............................................................................................................... 61
Functional Description................................................................................................................62
Register Summary......................................................................................................................66
Register Description................................................................................................................... 67
12. Peripherals Configuration Summary........................................................................80
12.1. SAM C20/C21 N.........................................................................................................................80
12.2. SAM C20/C21 E/G/J.................................................................................................................. 84
13. DSU - Device Service Unit...................................................................................... 88
13.1. Overview.................................................................................................................................... 88
13.2. Features..................................................................................................................................... 88
13.3. Block Diagram............................................................................................................................ 89
13.4. Signal Description...................................................................................................................... 89
13.5. Product Dependencies............................................................................................................... 89
13.6. Debug Operation........................................................................................................................ 90
13.7. Chip Erase..................................................................................................................................92
13.8. Programming..............................................................................................................................93
13.9. Intellectual Property Protection.................................................................................................. 93
13.10. Device Identification................................................................................................................... 95
13.11. Functional Description................................................................................................................96
13.12. Register Summary................................................................................................................... 101
13.13. Register Description.................................................................................................................103
14. DIVAS – Divide and Square Root Accelerator.......................................................125
14.1.
14.2.
14.3.
14.4.
14.5.
14.6.
14.7.
14.8.
Overview.................................................................................................................................. 125
Features................................................................................................................................... 125
Block Diagram.......................................................................................................................... 125
Signal Description.................................................................................................................... 125
Product Dependencies............................................................................................................. 125
Functional Description..............................................................................................................126
Register Summary....................................................................................................................129
Register Description................................................................................................................. 129
15. Clock System.........................................................................................................136
15.1.
15.2.
15.3.
15.4.
15.5.
15.6.
15.7.
Clock Distribution..................................................................................................................... 136
Synchronous and Asynchronous Clocks..................................................................................137
Register Synchronization......................................................................................................... 137
Enabling a Peripheral............................................................................................................... 139
On-demand, Clock Requests................................................................................................... 139
Power Consumption vs. Speed................................................................................................ 140
Clocks after Reset.................................................................................................................... 140
16. GCLK - Generic Clock Controller.......................................................................... 141
16.1.
16.2.
16.3.
16.4.
16.5.
Overview.................................................................................................................................. 141
Features................................................................................................................................... 141
Block Diagram.......................................................................................................................... 141
Signal Description.................................................................................................................... 142
Product Dependencies............................................................................................................. 142
©
2017 Microchip Technology Inc.
Datasheet Complete
DS60001479B-page 5
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