Product Specification
PE84140
Product Description
The PE84140 is an ultra-high linearity, passive broadband
Quad MOSFET array with high dynamic range performance
capable of operation beyond 6.0 GHz. This quad array
operates with differential signals at all ports (RF, LO, IF),
allowing mixers to be built that use LO powers from -7 dBm to
+20 dBm. Typical applications range from frequency up/down-
conversion to phase detection for Cellular/PCS Base Stations,
Wireless Broadband Communications and STB/Cable
modems.
The PE84140 is optimized for stringent military applications. It
is manufactured on Peregrine’s UltraCMOS™ process, a
patented variation of silicon-on-insulator (SOI) technology on a
sapphire substrate, offering the performance of GaAs with the
economy and integration of conventional CMOS.
Ultra-High Linearity UltraCMOS™
Broadband Quad MOSFET Array
Features
•
Ultimate Quad MOSFET array
•
Ultra-high linearity, broadband
performance beyond 6.0 GHz
•
Ideal for mixer applications
•
Up/down conversion
•
Low conversion loss
•
High LO Isolation
•
Optimized for stringent military
applications
Figure 1. Functional Diagram
Figure 2. Package Type
8-lead MSOP
LO
IF
RF
Table 1. AC and DC Electrical Specifications @ +25 °C
Symbol
F
TYP
V
DS
V
DS
Match
V
T
R
DS
Characteristics
Operating Frequency Range
1
Drain-Source Voltage
Drain-Source Voltage Match
Threshold Voltage
Drain-Source ‘ON’ Resistance
Min
DC
Typ
6.0
330
20
-100
8.25
Max
Units
GHz
mV
mV
mV
Ω
Test Conditions
V
GS
= +3V, I
DS
= 40 mA
V
DS
= 0.1V; per ASTM F617-00
V
GS
= +3V, I
DS
= 40 mA
Note 1: Typical untested operating frequency range of Quad MOSFET transistors.
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©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
PE84140
Product Specification
Figure 3. Pin Configuration (Top View)
LOM
LOP
GND
IFP
1
2
8
7
RFM
RFP
GND
IFM
Electrostatic Discharge (ESD) Precautions
This MOSFET device has minimally protected
inputs and is highly susceptible to ESD damage.
When handling this UltraCMOS™ device,
observe the same precautions that you would use
with other ESD-sensitive devices.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Description
PE84140
3
4
6
5
Table 2. Pin Descriptions
Pin
No.
1
2
3
4
5
6
7
8
Pin
Name
LOM
LOP
GND
IFP
IFM
GND
RFP
RFM
Description
LO Input Connection (Gate)
LO Input Connection (Gate)
Ground Connection
IF Output Connection (Drain)
IF Output Connection (Drain)
Ground Connection
RF Input Connection (Source)
RF Input Connection (Source)
The PE84140 passive broadband Quad MOSFET
array is designed for use in up-conversion and
down-conversion applications for high
performance systems.
The PE84140 is an ideal mixer core for a wide
range of mixer products, including module level
solutions that incorporate baluns or other single-
ended matching structures enabling three-port
operation.
The performance level of this passive mixer is
made possible by the very high linearity afforded
by Peregrine’s UltraCMOS™ process.
Table 3. Absolute Maximum Ratings
Symbol
T
ST
T
OP
Parameter/Conditions
Storage temperature range
Operating temperature
range
Maximum DC plus peak
AC voltage across Drain-
Source
Maximum DC plus peak
AC voltage across Gate-
Drain or Gate-Source
ESD Sensitive Device
Min
-65
-55
Max
150
125
Units
°C
°C
V
DC + AC
±3.3
V
V
DC+AC
V
ESD
±4.2
250
V
V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0127-02
│
UltraCMOS™ RFIC Solutions
PE84140
Product Specification
Evaluation Kit
Figure 4. Evaluation Board Layout
Peregrine Specification 101/0157
Applications Support
If you have a problem with your evaluation kit or if you have
applications questions, please contact applications support:
E-Mail: help@psemi.com (fastest response)
Phone: (858) 731-9400
Figure 5. Evaluation Board Schematic
Peregrine Specification 102/0214
Note:
This is the complete evaluation board schematic; which can be used for multiple configurations. Not all
components need be populated. Refer to the typical schematic on the following page.
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©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 7
PE84140
Product Specification
Figure 6. Typical Schematic
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 7
Document No. 70-0127-02
│
UltraCMOS™ RFIC Solutions
PE84140
Product Specification
Figure 7. Package Drawing
8-lead MSOP
TOP VIEW
0.65BSC
8
7
6
5
.525BSC
12
o
REF
2.45±0.10
2X
3.00±0.10
GAGE
PLANE
0.25
12
o
REF
R 0.90 MIN
R 0.90 MIN
0
o
6
o
0.55 ±0.15
0.95 BSC
0.51±0.13
-B-
1
2
3
4
.25 A B C
0.51±0.13
2.95±0.10
-C-
0.86±0.08
2.95±0.10
1.10 MAX
-A-
0.10 A
0.33+0.07
-0.08
0.08
A B C
3.00±0.10
FRONT VIEW
SIDE VIEW
0.10±0.05
3.00±0.10
4.90±0.15
Document No. 70-0127-02
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©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7