MDT10C22
1. General Description
This ROM-Based 8
-bit micro-controller uses a fully
static CMOS design technology to achieve high
speed, small size, low power and high noise
immunity.
On chip memory includes 1K words ROM and80
bytes static RAM.
Four comparator inputs with external Vref (not for 18
pin package) are also provided.
u
u
u
XTAL－Standard crystal oscillator
HFXT－High frequency crystal oscillator
4 oscillator start-up time can be selected by
programming option:
150
µs,
20 ms, 40 ms, 80 ms
On-chip RC oscillator based Watchdog
Timer(WDT) can be operated freely
12 I/O(for 18 pins package),14 I/O(for 20 pins
package),16 I/O(for 22/24 pins package) pins
with their own independent direction control
2. Features
u
u
u
u
Fully CMOS static design
8-bit data bus
On chip ROM size : 1 K words
Internal RAM size : 80 bytes
(72 general purpose registers, 8 special
registers)
u
u
u
u
u
u
36 single word instructions
14-bit instructions
2-level stacks
Operating voltage : 2.3V ~ 5.5 V
Operating frequency : 0 ~ 20 MHz
The most fast execution time is 200 ns under
20 MHz in all single cycle instructions except
the branch instruction
u
Addressing modes include direct, indirect and
relative addressing modes
u
u
u
u
u
Built-in Power-on Reset
4 Channel comparator
Power edge-detector Reset
Sleep Mode for power saving
8-bit real time clock/counter(RTCC) with 8-bit
programmable prescaler
u
4 types of oscillator can be selected by
programming option:
RC－Low cost RC oscillator
LFXT－Low frequency crystal oscillator
3. Applications
The application areas of this MDT10C22 range from
appliance motor control and high speed automotive
to low power remote transmitters/receivers, pointing
devices, and telecommunications processors, such
as Remote controller, small instruments, chargers,
toy, automobile and PC peripheral … etc
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 1
2005/6
Ver. 1.4
MDT10C22
6. Pin Function Description
Pin Name
PA0~PA7
I/O
I/O
Function Description
PA0~PA3 : TTL input level or comparator input
PA4 : TTL input level or comparator VREF input
PA5~PA7 : TTL input level
PB0~PB7
RTCC
/MCLR
OSC1
OSC2
Vdd
Vss
NC
I/O
I
I
I
O
Port B, TTL input level
Real Time Clock/Counter, Schmitt Trigger input levels
Master Clear, Schmitt Trigger input levels
Oscillator Input
Oscillator Output
Power supply
Ground
Unused ,do not connect
7. Memory Map
(A) Register Map
Address
00
01
02
03
04
05
06
07
08~0F
10~1F
30~3F
50~5F
70~7F
Description
Indirect Addressing Register
RTCC
PC
STATUS
MSR
Port A
Port B
Control register for comparator
Internal RAM, General Purpose Register
Internal RAM, Memory bank 0
Internal RAM, Memory bank 1
Internal RAM, Memory bank 2
Internal RAM, memory bank 3
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 4
2005/6
Ver. 1.4
MDT10C22
(1)IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A9
A8
A7~A0
Write PC, JUMP, CALL --- from STATUS b5
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK
(4) STATUS (Status register) : R3
Bit
0
1
2
3
4
5
Symbol
C
HC
Z
PF
TF
page
Carry bit
Half Carry bit
Zero bit
Power loss Flag bit
Time overflow Flag bit
ROM Page select bit :
00 : 000H --- 1FFH
01 : 200H --- 3FFH
7
——
General purpose bit
Function
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 5
2005/6
Ver. 1.4
onsemi and Avnet IoT Innovation Design Competition
京公网安备 11010802033920号
EEWORLD
