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74VCX38MTC

Description
Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
Categorylogic    logic   
File Size512KB,10 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74VCX38MTC Overview

Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs

74VCX38MTC Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instruction4.40 MM, MO-153AB, TSSOP-14
Contacts14
Reach Compliance Codeunknow
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)30 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingRAIL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su2.8 ns
propagation delay (tpd)33.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)1.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
July 1999
Revised February 2005
74VCX38
Low Voltage Quad 2-Input NAND Gate with
Open Drain Outputs and
3.6V Tolerant Inputs and Outputs
General Description
The VCX38 contains four 2-input NAND gates with open
drain outputs. This product is designed for low voltage
(1.2V to 3.6V) V
CC
applications with I/O compatibility up to
3.6V.
The VCX38 is fabricated with advanced CMOS technology
to achieve high-speed operation while maintaining CMOS
low power dissipation.
Features
s
1.2V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
2.8 ns max for 3.0V to 3.6V V
CC
s
Power-Off high impedance inputs and outputs
s
Static Drive (I
OL
)

24 mA @ 3.0V V
CC
s
Uses patented Quiet Series
¥
noise/EMI reduction
circuitry
s
Latchup performance exceeds JEDEC 78 conditions
s
ESD performance:
Human body model
!
2000V
Machine model
!
250V
s
Leadless Pb-Free DQFN package
Ordering Code:
Order Number
74VCX38M
74VCX38BQX
(Note 1)
74VCX38MTC
74VCX38MTCX_NL
Package
Number
M14A
MLP014A
MTC14
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
DQFN package available in Tape and Reel.
Quiet Series
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500161
www.fairchildsemi.com

74VCX38MTC Related Products

74VCX38MTC 74VCX38BQX 74VCX38 74VCX38M 74VCX38_05 74VCX38MTCX_NL
Description Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
Is it Rohs certified? conform to conform to - conform to - conform to
Maker Fairchild Fairchild - Fairchild - Fairchild
Parts packaging code TSSOP QFN - SOIC - TSSOP
package instruction 4.40 MM, MO-153AB, TSSOP-14 2.50 X 3 MM, MO-241AA, DQFN-14 - 0.150 INCH, MS-012, SOIC-14 - 4.40 MM, LEAD FREE, MO-153AB, TSSOP-14
Contacts 14 14 - 14 - 14
Reach Compliance Code unknow compli - unknow - _compli
series ALVC/VCX/A ALVC/VCX/A - ALVC/VCX/A - ALVC/VCX/A
JESD-30 code R-PDSO-G14 R-XQCC-N14 - R-PDSO-G14 - R-PDSO-G14
JESD-609 code e3 e3 - e3 - e3
length 5 mm 3 mm - 8.6235 mm - 5 mm
Load capacitance (CL) 30 pF 30 pF - 30 pF - 30 pF
Logic integrated circuit type NAND GATE NAND GATE - NAND GATE - NAND GATE
MaximumI(ol) 0.024 A 0.024 A - 0.024 A - 0.024 A
Humidity sensitivity level 1 1 - 1 - 1
Number of functions 4 4 - 4 - 4
Number of entries 2 2 - 2 - 2
Number of terminals 14 14 - 14 - 14
Maximum operating temperature 85 °C 85 °C - 85 °C - 85 °C
Minimum operating temperature -40 °C -40 °C - -40 °C - -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN - OPEN-DRAIN - OPEN-DRAIN
Package body material PLASTIC/EPOXY UNSPECIFIED - PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code TSSOP HVQCCN - SOP - TSSOP
Encapsulate equivalent code TSSOP14,.25 LCC14,.1X.12,20 - SOP14,.25 - TSSOP14,.25
Package shape RECTANGULAR RECTANGULAR - RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE - SMALL OUTLINE - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing RAIL TAPE AND REEL - RAIL - TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 NOT SPECIFIED - 260 - 260
power supply 3.3 V 3.3 V - 3.3 V - 3.3 V
Prop。Delay @ Nom-Su 2.8 ns 2.8 ns - 2.8 ns - 2.8 ns
propagation delay (tpd) 33.5 ns 33.5 ns - 33.5 ns - 33.5 ns
Certification status Not Qualified Not Qualified - Not Qualified - Not Qualified
Schmitt trigger NO NO - NO - NO
Maximum seat height 1.2 mm 0.8 mm - 1.753 mm - 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V - 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 1.2 V 1.2 V - 1.2 V - 1.2 V
Nominal supply voltage (Vsup) 1.5 V 1.5 V - 1.5 V - 1.5 V
surface mount YES YES - YES - YES
technology CMOS CMOS - CMOS - CMOS
Temperature level INDUSTRIAL INDUSTRIAL - INDUSTRIAL - INDUSTRIAL
Terminal surface Matte Tin (Sn) Tin (Sn) - Matte Tin (Sn) - Matte Tin (Sn)
Terminal form GULL WING NO LEAD - GULL WING - GULL WING
Terminal pitch 0.65 mm 0.5 mm - 1.27 mm - 0.65 mm
Terminal location DUAL QUAD - DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED
width 4.4 mm 2.5 mm - 3.9 mm - 4.4 mm
Base Number Matches 1 1 - 1 - 1
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