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74LVC1G132DCKTE4

Description
Logic Gates Sgl Bus Buffer Gate
Categorylogic    logic   
File Size433KB,15 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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74LVC1G132DCKTE4 Overview

Logic Gates Sgl Bus Buffer Gate

74LVC1G132DCKTE4 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeSOIC
package instructionTSSOP, TSSOP5/6,.08
Contacts5
Reach Compliance Codeunknow
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G5
JESD-609 codee4
length2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP5/6,.08
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su6 ns
propagation delay (tpd)16 ns
Certification statusNot Qualified
Schmitt triggerYES
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1.25 mm
Base Number Matches1

74LVC1G132DCKTE4 Related Products

74LVC1G132DCKTE4 74LVC1G132DCKRE4 SN74LVC1G132DBVTE4
Description Logic Gates Sgl Bus Buffer Gate Logic Gates Sgl Bus Buffer Gate Logic Gates SNGL 2 Input NAND Gate
Is it lead-free? Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to
Maker Texas Instruments Texas Instruments Texas Instruments
Parts packaging code SOIC SOIC SOT-23
package instruction TSSOP, TSSOP5/6,.08 GREEN, PLASTIC, SC-70, 5 PIN LSSOP, TSOP5/6,.11,37
Contacts 5 5 5
Reach Compliance Code unknow unknow unknow
series LVC/LCX/Z LVC/LCX/Z -
JESD-30 code R-PDSO-G5 R-PDSO-G5 -
JESD-609 code e4 e4 -
length 2 mm 2 mm -
Load capacitance (CL) 50 pF 50 pF -
Logic integrated circuit type NAND GATE NAND GATE -
MaximumI(ol) 0.024 A 0.024 A -
Humidity sensitivity level 1 1 -
Number of functions 1 1 -
Number of entries 2 2 -
Number of terminals 5 5 -
Maximum operating temperature 85 °C 85 °C -
Minimum operating temperature -40 °C -40 °C -
Output characteristics 3-STATE 3-STATE -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code TSSOP TSSOP -
Encapsulate equivalent code TSSOP5/6,.08 TSSOP5/6,.08 -
Package shape RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH -
method of packing TAPE AND REEL TAPE AND REEL -
Peak Reflow Temperature (Celsius) 260 260 -
power supply 3.3 V 3.3 V -
Prop。Delay @ Nom-Su 6 ns 6 ns -
propagation delay (tpd) 16 ns 16 ns -
Certification status Not Qualified Not Qualified -
Schmitt trigger YES YES -
Maximum seat height 1.1 mm 1.1 mm -
Maximum supply voltage (Vsup) 5.5 V 5.5 V -
Minimum supply voltage (Vsup) 1.65 V 1.65 V -
Nominal supply voltage (Vsup) 1.8 V 1.8 V -
surface mount YES YES -
technology CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL -
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) -
Terminal form GULL WING GULL WING -
Terminal pitch 0.65 mm 0.65 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
width 1.25 mm 1.25 mm -
Base Number Matches 1 1 -
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