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74F675ASPC

Description
F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
Categorylogic    logic   
File Size73KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74F675ASPC Overview

F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24

74F675ASPC Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeDIP
package instruction0.300 INCH, SLIM, PLASTIC, MS-001, DIP-24
Contacts24
Reach Compliance Codecompli
Other featuresPARALLEL OUTPUT IS REGISTERED; READ/WRITE CONTROL; HOLD MODE
Counting directionRIGHT
seriesF/FAST
JESD-30 codeR-PDIP-T24
JESD-609 codee3
length31.915 mm
Logic integrated circuit typeSERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Su85000000 Hz
Number of digits16
Number of functions1
Number of terminals24
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT APPLICABLE
power supply5 V
propagation delay (tpd)12 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT APPLICABLE
Trigger typeNEGATIVE EDGE
width7.62 mm
minfmax85 MHz
Base Number Matches1
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register
April 1988
Revised October 2000
74F675A
16-Bit Serial-In, Serial/Parallel-Out Shift Register
General Description
The 74F675A contains a 16-bit serial in/serial out shift reg-
ister and a 16-bit parallel out storage register. Separate
serial input and output pins are provided for expansion to
longer words. By means of a separate clock, the contents
of the shift register are transferred to the storage register.
The contents of the storage register can also be loaded
back into the shift register. A HIGH signal on the Chip
Select input prevents both shifting and parallel loading.
Features
s
Serial-to-parallel converter
s
16-Bit serial I/O shift register
s
16-Bit parallel out storage register
s
Recirculating parallel transfer
s
Expandable for longer words
s
Slim 24 lead package
s
74F675A version prevents false clocking through
CS or R/W inputs
Ordering Code:
Order Number
74F675ASC
74F675APC
74F675ASPC
Package Number
M24B
N24A
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS009587
www.fairchildsemi.com

74F675ASPC Related Products

74F675ASPC 74F675A 74F675A_00
Description F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
series F/FAST F/FAST F/FAST
Number of digits 16 16 16
Number of functions 1 1 1
Number of terminals 24 24 24
Maximum operating temperature 70 °C 70 Cel 70 Cel
Minimum operating temperature - 0.0 Cel 0.0 Cel
Output polarity TRUE TRUE TRUE
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal location DUAL DUAL DUAL
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE
Maximum supply/operating voltage - 5.5 V 5.5 V
Minimum supply/operating voltage - 4.5 V 4.5 V
Rated supply voltage - 5 V 5 V
Processing package description - 0.600 INCH, SLIM, PLASTIC, MS-011, DIP-24 0.600 INCH, SLIM, PLASTIC, MS-011, DIP-24
Lead-free - Yes Yes
state - ACTIVE ACTIVE
Craftsmanship - TTL TTL
packaging shape - RECTANGULAR RECTANGULAR
Package Size - IN-LINE IN-LINE
Terminal spacing - 2.54 mm 2.54 mm
terminal coating - MATTE TIN MATTE TIN
Packaging Materials - PLASTIC/EPOXY PLASTIC/EPOXY
Logic IC type - SERIAL IN PARALLEL OUT SERIAL IN PARALLEL OUT
propagation delay TPD - 12 ns 12 ns
Shift direction - RIGHT RIGHT
Max-Min frequency - 85 MHz 85 MHz
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