74ACT158_05 datasheet, PDF - EEWORLD Datasheet

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74ACT158_05: DescriptionACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16; Categorysemiconductor logic; File Size109KB，8 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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74ACT158_05 Overview

ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16

74ACT158_05 Parametric

Parameter Name	Attribute value
Number of functions	4
Number of terminals	16
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
Processing package description	0.150 INCH, MS-012, SOIC-16
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
terminal coating	MATTE TIN
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
series	ACT
Logic IC type	MULTIPLEXER
Number of inputs	2
Number of outputs	1
Output polarity	INVERTED
propagation delay TPD	11 ns

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74ACT158 Quad 2-Input Multiplexer

November 1988

Revised April 2005

74ACT158

Quad 2-Input Multiplexer

General Description

The ACT158 is a high-speed quad 2-input multiplexer. It

selects four bits of data from two sources using the com-

mon Select and Enable inputs. The four buffered outputs

present the selected data in the inverted form. The ACT158

can also be used as a function generator.

Features

reduced by 50%

Outputs source/sink 24 mA

TTL-compatible inputs

Ordering Code:

Order Number

74ACT158SC

74ACT158SJ

74ACT158MTC

74ACT158PC

Package Number

M16A

M16D

MTC16

N16E

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Logic Symbols

Connection Diagram

IEE/IEC

Pin Descriptions

Pin Names

–I

–Z

Description

Source 0 Data Inputs

Source 1 Data Inputs

Enable Input

Select Input

Inverted Outputs

FACT

is a trademark of Fairchild Semiconductor Corporation.

DS009930

www.fairchildsemi.com

74ACT158_05 Related Products

	74ACT158_05	74ACT158SJ	74ACT158SC	74ACT158MTC	74ACT158PC
Description	ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16	ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16	ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16	ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16	ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16
Number of functions	4	4	4	4	4
Number of terminals	16	16	16	16	16
Maximum operating temperature	85 Cel	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 Cel	-40 °C	-40 °C	-40 °C	-40 °C
surface mount	Yes	YES	YES	YES	NO
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
series	ACT	ACT	ACT	ACT	ACT
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED
Is it Rohs certified?	-	conform to	conform to	conform to	conform to
Maker	-	Fairchild	Fairchild	Fairchild	Fairchild
Parts packaging code	-	SOIC	SOIC	TSSOP	DIP
package instruction	-	SOP, SOP16,.3	SOP, SOP16,.25	TSSOP, TSSOP16,.25	DIP, DIP16,.3
Contacts	-	16	16	16	16
Reach Compliance Code	-	compli	unknow	unknow	compli
JESD-30 code	-	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDIP-T16
JESD-609 code	-	e3	e3	e3	-
length	-	10.2 mm	9.902 mm	5 mm	19.305 mm
Load capacitance (CL)	-	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	-	MULTIPLEXER	MULTIPLEXER	MULTIPLEXER	MULTIPLEXER
MaximumI(ol)	-	0.024 A	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	-	1	1	1	-
Number of entries	-	2	2	2	2
Output times	-	1	1	1	1
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	SOP	SOP	TSSOP	DIP
Encapsulate equivalent code	-	SOP16,.3	SOP16,.25	TSSOP16,.25	DIP16,.3
Package shape	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE
Peak Reflow Temperature (Celsius)	-	260	260	260	NOT SPECIFIED
power supply	-	5 V	5 V	5 V	5 V
Prop。Delay @ Nom-Su	-	8.5 ns	8.5 ns	8.5 ns	8.5 ns
propagation delay (tpd)	-	11 ns	11 ns	11 ns	11 ns
Certification status	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	-	2.1 mm	1.753 mm	1.1 mm	5.08 mm
Maximum supply voltage (Vsup)	-	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	-	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	-	5 V	5 V	5 V	5 V
technology	-	CMOS	CMOS	CMOS	CMOS
Terminal surface	-	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	-
Terminal pitch	-	1.27 mm	1.27 mm	0.65 mm	2.54 mm
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	-	5.3 mm	3.9 mm	4.4 mm	7.62 mm
Base Number Matches	-	1	1	1	1

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