74ACT158 Quad 2-Input Multiplexer
November 1988
Revised April 2005
74ACT158
Quad 2-Input Multiplexer
General Description
The ACT158 is a high-speed quad 2-input multiplexer. It
selects four bits of data from two sources using the com-
mon Select and Enable inputs. The four buffered outputs
present the selected data in the inverted form. The ACT158
can also be used as a function generator.
Features
s
I
CC
reduced by 50%
s
Outputs source/sink 24 mA
s
TTL-compatible inputs
Ordering Code:
Order Number
74ACT158SC
74ACT158SJ
74ACT158MTC
74ACT158PC
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
Connection Diagram
IEE/IEC
Pin Descriptions
Pin Names
I
0a
–I
0d
I
1a
–I
1d
E
S
Z
a
–Z
d
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Inverted Outputs
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009930
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74ACT158
Functional Description
The ACT158 quad 2-input multiplexer selects four bits of
data from two sources under the control of a common
Select input (S) and presents the data in inverted form at
the four outputs. The Enable input (E) is active-LOW. When
E is HIGH, all of the outputs (Z) are forced HIGH regard-
less of all other inputs. The ACT158 is the logic implemen-
tation of a 4-pole, 2-position switch where the position of
the switch is determined by the logic levels supplied to the
Select input.
A common use of the ACT158 is the moving of data from
two groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of the Select input. A less obvious use is as a
function generator. The ACT158 can generate four func-
tions of two variables with one variable common. This is
useful for implementing gating functions.
Truth Table
Inputs
E
H
L
L
L
L
S
X
L
L
H
H
I
0
X
L
H
X
X
I
1
X
X
X
L
H
Outputs
Z
H
H
L
H
L
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74ACT158
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
V
I
0.5V to
7.0V
20 mA
20 mA
0.5V to V
CC
0.5V
20 mA
20 mA
0.5V to V
CC
0.5V
r
50 mA
r
50 mA
65
q
C to
150
q
C
140
q
C
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
V/
'
t)
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
4.5V to 5.5V
0V to V
CC
0V to V
CC
0.5V
V
CC
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
V
O
40
q
C to
85
q
C
0.5V
V
CC
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
Junction Temperature (T
J
)
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variable. Fairchild does not
recommend operation of FACT
¥
circuits outside databook specifications.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
4.5
5.5
I
IN
I
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Maximum
I
CC
/Input
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
5.5
4.0
0.6
0.001
0.001
T
A
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
25
q
C
T
A
40
q
C to
85
q
C
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
Guaranteed Limits
Units
V
V
V
V
OUT
V
OUT
I
OUT
V
IN
V
I
OH
I
OH
V
I
OUT
V
IN
V
I
OL
I
OL
V
I
V
I
Conditions
0.1V
0.1V
or V
CC
0.1V
or V
CC
0.1V
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 2)
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 2)
V
CC
, GND
V
CC
2.1V
1.65V Max
3.85V Min
V
CC
r
0.1
r
1.0
1.5
75
P
A
mA
mA
mA
V
OLD
V
OHD
V
IN
or GND
75
40.0
P
A
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
3
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74ACT158
AC Electrical Characteristics
V
CC
Symbol
Parameter
(V)
(Note 4)
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay
S to Z
n
Propagation Delay
S to Z
n
Propagation Delay
E to Z
n
Propagation Delay
E to Z
n
Propagation Delay
I
n
to Z
n
Propagation Delay
I
n
to Z
n
Note 4:
Voltage Range 5.0 is 5.0V
r
0.5V
T
A
C
L
Min
2.5
1.5
1.5
1.5
1.5
1.5
25
q
C
50 pF
Typ
6.0
5.5
5.5
5.5
4.5
4.0
Max
9.5
9.0
9.5
9.5
8.0
6.5
T
A
40
q
C to
85
q
C
C
L
50 pF
Max
11.0
10.0
10.5
10.5
8.5
7.5
ns
ns
ns
ns
ns
ns
Units
Min
2.0
1.5
1.5
1.5
1.0
1.0
5.0
5.0
5.0
5.0
5.0
5.0
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
45.0
Units
pF
pF
V
CC
V
CC
OPEN
5.0V
Conditions
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74ACT158
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
5
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