SIT8208AC-G3-18E-25.000000X datasheet, PDF

Datasheet> All Categories > Passive components> SIT8208AC-G3-18E-25.000000X

Preview

SIT8208AC-G3-18E-25.000000X: Description-20 TO 70C, 2520, 50PPM, 1.8V, 2; CategoryPassive components; File Size750KB，15 Pages; ManufacturerSiTime; Environmental Compliance

Download Datasheet View All

SIT8208AC-G3-18E-25.000000X Overview

-20 TO 70C, 2520, 50PPM, 1.8V, 2

Preview

Download Datasheet

View All

SiT8208

Ultra Performance Oscillator

The Smart Timing Choice

Features



Applications



Any frequency between 1 and 80 MHz accurate to 6 decimal places

100% pin-to-pin drop-in replacement to quartz-based oscillators

Ultra low phase jitter: 0.5 ps (12 kHz to 20 MHz)

Frequency stability as low as ±10 PPM

Industrial or extended commercial temperature range

LVCMOS/LVTTL compatible output

Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2,

7.0 x 5.0 mm x mm

Instant samples with

Time Machine II

and

field programmable

oscillators

Outstanding silicon reliability of 2 FIT or 500 million hour MTBF

Pb-free, RoHS and REACH compliant

Ultra short lead time

SATA, SAS, Ethernet, PCI Express, video, WiFi

Computing, storage, networking, telecom, industrial control

Electrical Characteristics

[1]

Parameter

Output Frequency Range

Frequency Stability

Symbol

F_stab

Min.

-10

-20

-25

-50

First year Aging

10-year Aging

Operating Temperature Range

T_use

F_aging

-1.5

-5

-20

-40

Supply Voltage

Vdd

1.71

2.25

2.52

2.97

Current Consumption

OE Disable Current

Idd

I_OD

–

Standby Current

I_std

–

Duty Cycle

Rise/Fall Time

Output Voltage High

Output Voltage Low

Input Voltage High

Input Voltage Low

Input Pull-up Impedance

Tr, Tf

VOH

VOL

VIH

VIL

Z_in

–

90%

–

70%

–

Typ.

–

1.8

2.5

2.8

3.3

–

1.2

–

100

–

Max.

+10

+20

+25

+50

+1.5

+70

+85

1.89

2.75

3.08

3.63

–

10%

–

30%

250

–

Unit

MHz

PPM

°C

A

Vdd

kΩ

MΩ

15 pF load, 10% - 90% Vdd

IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V)

IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V)

No load condition, f = 20 MHz, Vdd = 2.5V, 2.8V or 3.3V

No load condition, f = 20 MHz, Vdd = 1.8V

Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled

Down

Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down

Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled

Down

Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down

25°C

Extended Commercial

Industrial

Supply voltages between 2.5V and 3.3V can be supported.

Contact

SiTime

for additional information.

Inclusive of Initial tolerance at 25 °C, and variations over

operating temperature, rated power supply voltage and load

Condition

Frequency Range

Frequency Stability and Aging

Operating Temperature Range

Supply Voltage and Current Consumption

LVCMOS Output Characteristics

Input Characteristics

Pin 1, OE or ST

Pin 1, OE logic high or logic low, or ST logic high

Pin 1, ST logic low

Note:

1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.

SiTime Corporation

Rev. 1.02

990 Almanor Avenue

Sunnyvale, CA 94085

(408) 328-4400

www.sitime.com

Revised June 24, 2013

Recommended Resources

Simple RF LC filter circuit diagram

TIL113/TIL119A type optocoupler circuit

8031 microcomputer crash self-reset system

MC13176 receiving circuit

Constant current timing charging circuit

Satellite receiving antenna follow-up control circuit

When studying the Sdram controller of s3c2410, there is a parameter that I don't understand: There is a parameter Tsrc, which is called SDRAM Semi Row Cycle Time in the manual. But I still don't understand what it is used for. Please help explain it to me, thank you....; pklegend123 Embedded System

What if we use FPGA in conjunction with DSP to improve security capabilities?: Designs based on digital signal processors (DSPs) are particularly vulnerable to intrusion if the DSP does not have adequate security capabilities. In many applications, advanced security features can...; fish001 DSP and ARM Processors

Develop FPGA+SDRAM high-depth logic analyzer design ideas, original: For reference. [[i] This post was last edited by mr.king on 2012-3-25 22:31[/i]]...; mr.king FPGA/CPLD

Looking for the official SDK of HiSilicon's HI3518EV300: I couldn't find a download link for this chip's information on the official website. I found some second-hand SDKs online, but I'm not very reassured. Is there an official channel to obtain this infor...; littleshrimp Domestic Chip Exchange

Temperature Measurement Record--Comparative Measurement: Temperature measurement record -- comparative measurement:Figure 1: Comparison of two thermometers measuring the temperature of a heating plate in a factoryFigure 2. Comparison of two thermometers mea...; lanhua Making friends through disassembly

TMS570x/RM4x LaunchPad: Basic setup of MIBSPI loopback mode based on examples: Today I spent half a day on the loopback mode of MIBSPI. As a beginner, there are many things worth reflecting on. I usually read a lot of technical posts in the forum and benefited a lot. Therefore, ...; 自由的电子e Microcontroller MCU

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components