SSM3K337R
MOSFETs
Silicon N-Channel MOS
SSM3K337R
1. Applications
•
Relay Drivers
2. Features
(1)
(2)
(3)
AEC-Q101 Qualified (Note1).
4.0-V gate drive voltage.
Low drain-source on-resistance
: R
DS(ON)
= 200 mΩ (max) (@V
GS
= 4.0 V, I
D
= 1.0 A)
R
DS(ON)
= 176 mΩ (max) (@V
GS
= 4.5 V, I
D
= 2.0 A)
R
DS(ON)
= 150 mΩ (max) (@V
GS
= 10 V, I
D
= 2.0 A)
(4) HBM: 2-kV class
Note 1: For detail information, please contact to our sales.
3. Packaging and Pin Assignment
1: Gate
2: Source
3: Drain
SOT-23F
Start of commercial production
©2016-2018
Toshiba Electronic Devices & Storage Corporation
1
2013-12
2018-04-18
Rev.5.0
SSM3K337R
4. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
Power dissipation
Power dissipation
Channel temperature
Single-pulse active clamp capability
Storage temperature
(Note 4)
(t
≤
10 s)
(Note 1)
(Note 1), (Note 2)
(Note 3)
(Note 3)
Symbol
V
DS(DC)
V
GSS
I
D
I
DP
P
D
P
D
T
ch
E
AS
T
stg
Rating
38
±20
2
6
1
2
150
4.5
-55 to 150
mJ
W
A
Unit
V
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Ensure that the channel temperature does not exceed 150
.
Note 2: Pulse width (PW)
≤
10 ms, duty
≤
1%
Note 3: Device mounted on an FR4 board. (25.4 mm
×
25.4 mm
×
1.6 mm ,Cu pad: 645 mm
2
)
Note 4: V
DD
= 25 V, T
ch
= 25 (Initial state), L = 1 mH
Note:
Note:
Note:
The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables,
operators, soldering irons and other objects should be protected against anti-static discharge.
The channel-to-ambient thermal resistance, R
th(ch-a)
, and the drain power dissipation, P
D
, vary according to
the board material, board area, board thickness and pad area. When using this device, be sure to take heat
dissipation fully into account.
©2016-2018
Toshiba Electronic Devices & Storage Corporation
2
2018-04-18
Rev.5.0
SSM3K337R
5. Electrical Characteristics
5.1. Static Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Gate leakage current
Drain cut-off current
Drain-source clamp voltage
Gate threshold voltage
Drain-source on-resistance
(Note 1)
(Note 2)
Symbol
I
GSS
I
DSS
V
th
Test Condition
V
GS
=
±16
V, V
DS
= 0 V
V
DS
= 30.4 V, V
GS
= 0 V
V
DS
= 10 V, I
D
= 1 mA
I
D
= 2.0 A, V
GS
= 4.5 V
I
D
= 1.0 A, V
GS
= 4.0 V
Forward transfer admittance
(Note 2)
|Y
fs
|
V
DS
= 10 V, I
D
= 1.0 A
Min
38
0.7
Typ.
43
135
155
161
4.1
Max
±10
10
48
1.7
150
176
200
S
V
V
mΩ
Unit
µA
V
(CL)DSS
I
D
= 1 mA, V
GS
= 0 V
R
DS(ON)
I
D
= 2.0 A, V
GS
= 10 V
Note 1: Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to below (1 mA for
this device). Then, for normal switching operation, V
GS(ON)
must be higher than V
th
, and V
GS(OFF)
must be
lower than V
th
. This relationship can be expressed as: V
GS(OFF)
< V
th
< V
GS(ON)
.
Take this into consideration when using the device.
Note 2: Pulse measurement.
5.2. Dynamic Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time (turn-on time)
Switching time (turn-off time)
Symbol
C
iss
C
rss
C
oss
t
on
t
off
V
DD
= 20 V, I
D
= 0.5 A
V
GS
= 0 to 4.5 V, R
G
= 10
Ω
See Chapter 5.3.
Test Condition
V
DS
= 10 V, V
GS
= 0 V,
f = 1 MHz
Min
Typ.
120
7.2
33
380
700
Max
ns
Unit
pF
5.3. Switching Time Test Circuit
Fig. 5.3.1 Switching Time Test Circuit
Fig. 5.3.2 Input Waveform/Output Waveform
5.4. Gate Charge Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Total gate charge (gate-source plus gate-drain)
Gate-source charge 1
Gate-drain charge
Symbol
Q
g
Q
gs1
Q
gd
Test Condition
V
DD
= 30.4 V, V
GS
= 10 V,
I
D
= 1.0 A
Min
Typ.
3.0
0.6
0.5
Max
Unit
nC
©2016-2018
Toshiba Electronic Devices & Storage Corporation
3
2018-04-18
Rev.5.0
SSM3K337R
5.5. Source-Drain Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Diode forward voltage
(Note 1)
Symbol
V
DSF
Test Condition
I
D
= -2.0 A, V
GS
= 0 V
Min
Typ.
-0.87
Max
-1.2
Unit
V
Note 1: Pulse measurement.
6. Marking
Fig. 6.1 Marking
©2016-2018
Toshiba Electronic Devices & Storage Corporation
4
2018-04-18
Rev.5.0
SSM3K337R
7. Characteristics Curves (Note)
Fig. 7.1 I
D
- V
DS
Fig. 7.2 I
D
- V
GS
Fig. 7.3 R
DS(ON)
- V
GS
Fig. 7.4 R
DS(ON)
- I
D
Fig. 7.5 R
DS(ON)
- T
a
Fig. 7.6 V
th
- T
a
©2016-2018
Toshiba Electronic Devices & Storage Corporation
5
2018-04-18
Rev.5.0
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