534PC002426DGR datasheet, PDF - EEWORLD Datasheet

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534PC002426DGR: DescriptionQUAD FREQUENCY XO, OE PIN 2; CategoryPassive components; File Size445KB，12 Pages; ManufacturerSilicon Laboratories Inc

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534PC002426DGR Overview

QUAD FREQUENCY XO, OE PIN 2

534PC002426DGR Parametric

Parameter Name	Attribute value
type	XO (Standard)
Frequency - Output 1	12MHz
Frequency - Output 2	50MHz
Frequency - Output 3	50MHz
Frequency - Output 4	50MHz
Function	enable/disable
output	CMOS
Voltage - Power	3.3V
frequency stability	±7ppm
Operating temperature	-40°C ~ 85°C
Current - Power (maximum)	88mA
size/dimensions	0.276" long x 0.197" wide (7.00mm x 5.00mm)
high	0.071"（1.80mm）
Package/casing	8-SMD, no leads
Current - Power (disabled) (maximum)	75mA

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Si534

EVISION

UAD

R E Q U E N C Y

RYSTAL

S C I L L A T O R

(XO)

(10 M H

Z TO

1 . 4 G H

)

Features

Available with any-rate output



frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz



Four selectable output frequencies



3rd generation DSPLL with superior



jitter performance



3x better frequency stability than

SAW-based oscillators



Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout



Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH



Networking



SD/HD video



Test and measurement



Clock and data recovery



FPGA/ASIC clock generation



Pin Assignments:

See page 6.

(Top View)

FS[1]

GND

FS[0]

Description

The Si534 quad frequency XO utilizes Silicon Laboratories’ advanced

DSPLL

circuitry to provide a low jitter clock at high frequencies. The Si534

is available with any-rate output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is

required for each output frequency, the Si534 uses one fixed crystal to

provide a wide range of output frequencies. This IC-based approach allows

the crystal resonator to provide exceptional frequency stability and reliability.

In addition, DSPLL clock synthesis provides superior supply noise rejection,

simplifying the task of generating low jitter clocks in noisy environments

typically found in communication systems. The Si534 IC-based XO is factory

configurable for a wide variety of user specifications including frequency,

supply voltage, output format, and temperature stability. Specific

configurations are factory programmed at time of shipment, thereby

eliminating long lead times associated with custom oscillators.

CLK–

CLK+

(LVDS/LVPECL/CML)

FS[1]

GND

FS[0]

Functional Block Diagram

CLK– CLK+

CLK

FS[1]

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

FS[0]

(CMOS)

GND

Rev. 1.4 6/18

Si534

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