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LTC4301LCMS8#PBF

Description
IC REDRIVER I2C HOTSWAP 8MSOP
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size159KB,12 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
Download Datasheet Parametric View All

LTC4301LCMS8#PBF Overview

IC REDRIVER I2C HOTSWAP 8MSOP

LTC4301LCMS8#PBF Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?conform to
Parts packaging codeMSOP
package instructionTSSOP, TSSOP8,.19
Contacts8
Manufacturer packaging codeMS8
Reach Compliance Codecompliant
ECCN codeEAR99
Interface integrated circuit typeINTERFACE CIRCUIT
JESD-30 codeS-PDSO-G8
JESD-609 codee3
length3 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.19
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3/5 V
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum slew rate6.2 mA
Maximum supply voltage5.5 V
Minimum supply voltage2.7 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3 mm
Base Number Matches1
LTC4301L
Hot Swappable 2-Wire
Bus Buffer with Low Voltage
Level Translation
DESCRIPTIO
The LTC
®
4301L hot swappable, 2-wire bus buffer allows
I/O card insertion into a live backplane without corruption
of the data and clock busses. In addition, the LTC4301L
SDAIN and SCLIN pins are compatible with systems with
pull-up voltages as low as 1V. Control circuitry prevents
the backplane from being connected to the card until a
stop bit or a bus idle is present. When the connection is
made, the LTC4301L provides bidirectional buffering,
keeping the backplane and card capacitances isolated.
When driven low, the CS input pin allows the part to
connect after a stop bit or bus idle occurs. Driving CS high
breaks the connection between SCLIN and SCLOUT and
between SDAIN and SDAOUT. A logic high on READY
indicates that the backplane and card sides are connected
together.
The LTC4301L is offered in 8-pin DFN (3mm
×
3mm) and
MSOP packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7032051.
FEATURES
Level Translates 1V Signals to Standard 3.3V and
5V Logic Rails
Allows Bus Pull-Up Voltages as Low as 1V on
SDAIN and SCLIN
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
Isolates Input SDA and SCL Line from Output
10kV Human Body Model ESD Protection
Supports Clock Stretching, Arbitration and
Synchronization
High Impedance SDA, SCL Pins for V
CC
= 0V
CS Gates Connection from Input to Output
Compatible with I
2
C
TM
, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
Small 8-Pin MSOP and DFN (3mm
×
3mm) Packages
APPLICATIO S
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computers
TYPICAL APPLICATIO
1.2V
Input-Output Connection
3.3V
0.01µF
2k
SDA
µP
SCL
2k
SDAIN
SCLIN
CS
GND
GND
4301l TA01a
V
CC
V
CC
SDAOUT
SCLOUT
READY
LTC4301L
10k
10k
SDA
SCL
OUTPUT
SIDE
20pF
0.5V/DIV
INPUT
SIDE
55pF
U
U
U
1µs/DIV
4301 TA01b
4301lfa
1

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