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25C040-E/ST

Description
Complete, 100ksps, 8-Channel, 12-Bit Data Acquisition Systems
Categorystorage    storage   
File Size402KB,22 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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25C040-E/ST Overview

Complete, 100ksps, 8-Channel, 12-Bit Data Acquisition Systems

25C040-E/ST Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instruction4.40 MM, PLASTIC, TSSOP-8
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Other featuresDATA RETENTION > 200 YEARS; 1M ENDURANCE CYCLES
Maximum clock frequency (fCLK)3 MHz
Data retention time - minimum200
Durability1000000 Write/Erase Cycles
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.4 mm
memory density4096 bi
Memory IC TypeEEPROM
memory width8
Humidity sensitivity level1
Number of functions1
Number of terminals8
word count512 words
character code512
Operating modeSYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize512X8
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.2 mm
Serial bus typeSPI
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3 mm
Maximum write cycle time (tWC)5 ms
Base Number Matches1
Not recommended for new designs –
Please use 25AA040A or 25LC040A.
25AA040/25LC040/25C040
4K SPI Bus Serial EEPROM
Device Selection Table
Part
Number
25AA040
25LC040
25C040
V
CC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max. Clock
Frequency
1 MHz
2 MHz
3 MHz
Temp.
Ranges
I
I
I,E
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts. Also, write operations to the device can be
disabled via the write-protect pin (WP).
Package Types
PDIP
CS
SO
1
8
V
CC
HOLD
SCK
SI
2
3
4
25XX040
Features:
• Low-power CMOS technology:
- Write current: 3 mA, typical
- Read current: 500
μA,
typical
- Standby current: 500 nA, typical
• 512 x 8-bit organization
• 16 byte page
• Write cycle time: 5 ms max.
• Self-timed Erase and Write cycles
• Block write protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in write protection:
- Power on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential read
• High reliability:
- Endurance: 1M cycles
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-pin PDIP, SOIC and TSSOP packages
• Temperature ranges supported:
- Industrial (I):
-40°C to +85°C
- Automotive (E) (25C040):
-40°C to +125°C
7
6
5
WP
V
SS
SOIC
CS
SO
WP
V
SS
1
8
V
CC
HOLD
SCK
SI
2
3
4
25XX040
1
2
3
4
7
6
5
TSSOP
25XX040
HOLD
V
CC
CS
SO
8
7
6
5
SCK
SI
V
SS
WP
Block Diagram
STATUS
Register
HV Generator
I/O Control
Logic
Description:
The Microchip Technology Inc. 25AA040/25LC040/
25C040 (25XX040
*
) is a 4 Kbit serial Electrically
Erasable PROM. The memory is accessed via a simple
Serial Peripheral Interface (SPI) compatible serial bus.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a Chip Select (CS)
input.
*25XX040 is used in this document as a generic part number
for the 25AA040/25LC040/25C040 devices.
Memory
Control
Logic
EEPROM
Array
XDEC
Page
Latches
SI
SO
CS
SCK
HOLD
WP
V
CC
V
SS
Y Decoder
Sense Amp.
R/W Control
©
2006 Microchip Technology Inc.
DS21204E-page 1

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