SI5356A-B02187-GMR datasheet, PDF

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SI5356A-B02187-GMR: DescriptionI2C PROG, ANY FREQUENCY, ANY OUT; Categorysemiconductor Analog mixed-signal IC; File Size657KB，22 Pages; ManufacturerSilicon Laboratories Inc

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SI5356A-B02187-GMR Overview

I2C PROG, ANY FREQUENCY, ANY OUT

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S i535 5

N Y

-F

R E Q U E N C Y

1–20 0 MH

U A D

R E Q U E N C Y

8-O

U T P U T

L O C K

E N E R A T O R

Features



Generates any frequency from 1 to



200 MHz on each of the 4 output banks

Eight CMOS clock outputs

Guaranteed 0 ppm frequency synthesis



error for any combination of frequencies



25 or 27 MHz xtal or 5–200 MHz input clk



Five programmable control pins (output

enable, frequency select, reset)



Separate OEB pins to disable individual



banks or all outputs

Loss of signal output



Low 50 ps (typ) pk-pk period jitter



Phase jitter: 2 ps rms 12 kHz–20 MHz

Excellent PSRR performance

eliminates need for external power

supply filtering

Low power: 45 mA (core)

Core VDD: 1.8, 2.5, or 3.3 V

Separate VDDO for each bank of

outputs: 1.8, 2.5, or 3.3 V

Small size: 4x4 mm 24-QFN

Industrial temperature range:

–40 to +85 °C

Custom versions available using

ClockBuilder™ web utility

Samples available in 2 weeks

Ordering Information:

See page 17.

Pin Assignments

Applications



Printers



Audio/video



Networking



Communications



Storage

Switches/routers

Computing

Servers

OC-3/OC-12 line cards

Description

The Si5355 is a highly flexible clock generator capable of synthesizing four

completely non-integer related frequencies up to 200 MHz. The device has four

banks of outputs with each bank supporting two CMOS outputs at the same

frequency. Using Silicon Laboratories' patented MultiSynth fractional divider

technology, all outputs are guaranteed to have 0 ppm frequency synthesis error

regardless of configuration, enabling the replacement of multiple clock ICs and

crystal oscillators with a single device. Through a flexible web configuration utility

called ClockBuilder™ (www.silabs.com/ClockBuilder), factory-customized pin-

controlled Si5355 devices are available in two weeks without minimum order

quantity restrictions. The Si5355 supports up to three independent, pin-selectable

device configurations, enabling one device to replace three separate clock ICs.

Functional Block Diagram

Rev. 1.2 4/17

Si5355

Si5355

A B L E

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

3.1. Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

3.2. Breakthrough MultiSynth Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

3.3. Input and Output Frequency Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.4. Multi-Function Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.5. Output Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.6. Frequency Select/Device Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.7. Loss-of-Signal Alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.8. CMOS Output Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

3.9. Jitter Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

3.10. Power Supply Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

3.11. ClockBuilder Web-Customization Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

5.1. Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

6. Package Outline: 24-Lead QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

7. Recommended PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

8. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

8.1. Si5355 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

8.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Rev. 1.2

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