ZSC31010CIB datasheet, PDF - EEWORLD Datasheet

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ZSC31010CIB: DescriptionWAFER (UNSAWN) - BOX; Categoryunclassified; File Size411KB，43 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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RBic

LiteTM

Analog Output

Sensor Signal Conditioner

ZSC31010

Datasheet

Brief Description

The ZSC31010 is a sensor signal conditioner inte-

grated circuit, which enables easy and precise

calibration of resistive bridge sensors via EEPROM.

When mated to a resistive bridge sensor, it will

digitally correct offset and gain with the option to

correct offset and gain coefficients and linearity over

temperature. A second-order compensation can be

enabled for temperature coefficients of gain or offset

or bridge linearity. The ZSC31010 communicates via

IDT’s ZACwire™ serial interface to the host

computer and is easily mass calibrated in a

Windows® environment. Once calibrated, the output

pin Sig™ can provide selectable 0 to 1 V, rail-to-rail

ratiometric analog output, or digital serial output of

bridge data with optional temperature data.

Benefits

•

No external trimming components required

Simple PC-controlled configuration and

calibration via ZACwire™ One-Wire Interface

High accuracy (±0.1% FSO @ -25 to 85°C;

±0.25% FSO @ -50 to 150°C)

Single pass calibration – quick and precise

Suitable for battery-powered applications

Small SOP8 package

Available Support

•

Features

•

Development Kit available

Mass Calibration Kit available

Support for industrial mass calibration available

Quick circuit customization possible for large

production volumes

Digital compensation of sensor offset, sensitivity,

temperature drift, and non-linearity

Accommodates differential sensor signal spans,

from 3 mV/V to 105 mV/V

ZACwire™ One-Wire Interface (OWI)

Internal temperature compensation and detection

via bandgap PTAT (proportional to absolute

temperature)

Output options: rail-to-rail analog output voltage,

absolute analog voltage, digital ZACwire™ One-

Wire Interface (OWI)

Optional sequential output of both temperature

and bridge readings on ZACwire™ digital output

Fast response time, 1 ms (typical)

High voltage protection up to 30 V with

external JFET

Chopper-stabilized true differential ADC

Buffered and chopper-stabilized output DAC

Physical Characteristics

•

Supply voltage 2.7 to 5.5 V, with external JFET

5.5V to 30 V

Current consumption depending on adjusted

sample rate: 0.25 mA to 1 mA

Wide operational temperature: –50 to +150°C

•

ZSC31010 Application Circuit – Digital Output

supply

+4.5 to +5.5 V

•

VDD

Bsink

Sig™

OUT/OWI

ZSC31010

VBP

Vgate

VBN

VSS

0.1µF

10nF

Ground

January 20, 2016

ZSC31010 Datasheet

Contents

List of Figures ............................................................................................................................................................. 4

List of Tables .............................................................................................................................................................. 5

1 Electrical Characteristics ..................................................................................................................................... 6

1.1. Absolute Maximum Ratings .......................................................................................................................... 6

1.2. Recommended Operating Conditions .......................................................................................................... 6

1.3. Electrical Parameters ................................................................................................................................... 7

1.3.1. Supply/Regulation Characteristics ......................................................................................................... 7

1.3.2. Analog Front-End (AFE) Characteristics................................................................................................ 7

1.3.3. EEPROM Parameters ............................................................................................................................ 7

1.3.4. A/D Converter Characteristics ............................................................................................................... 7

1.3.5. Analog Output (DAC and Buffer) Characteristics .................................................................................. 7

1.3.6. ZACwire™ Serial Interface .................................................................................................................... 8

1.3.7. System Response Characteristics ......................................................................................................... 8

1.4. Analog Inputs versus Output Resolution ...................................................................................................... 9

2 Circuit Description ............................................................................................................................................. 11

2.1. Signal Flow and Block Diagram.................................................................................................................. 11

2.2. Analog Front End ........................................................................................................................................ 12

2.2.1. Bandgap/PTAT and PTAT Amplifier .................................................................................................... 12

2.2.2. Bridge Supply ....................................................................................................................................... 12

2.2.3. PREAMP Block .................................................................................................................................... 12

2.2.4. Analog-to-Digital Converter (ADC)....................................................................................................... 12

2.3. Digital Signal Processor ............................................................................................................................. 13

2.3.1. EEPROM .............................................................................................................................................. 14

2.3.2. One-Wire Interface—ZACwire™ .......................................................................................................... 14

2.4. Output Stage............................................................................................................................................... 15

2.4.1. Digital to Analog Converter (Output DAC) ........................................................................................... 15

2.4.2. Output Buffer ........................................................................................................................................ 15

2.4.3. Voltage Reference Block ..................................................................................................................... 15

2.5. Clock Generator / Power-On Reset (CLKPOR) ......................................................................................... 16

2.5.1. Trimming the Oscillator ........................................................................................................................ 17

3 Functional Description ....................................................................................................................................... 18

3.1. General Working Mode ............................................................................................................................... 18

3.2. ZACwire™ Communication Interface ......................................................................................................... 19

3.2.1. Properties and Parameters .................................................................................................................. 19

3.2.2. Bit Encoding ......................................................................................................................................... 20

3.2.3. Write Operation from Master to ZSC31010 ......................................................................................... 20

3.2.4. ZSC31010 Read Operations ................................................................................................................ 21

3.2.5. High Level Protocol .............................................................................................................................. 24

January 20, 2016

ZSC31010 Datasheet

3.3. Command/Data Bytes Encoding ................................................................................................................ 24

3.4. Calibration Sequence ................................................................................................................................. 25

3.5. EEPROM Bits ............................................................................................................................................. 27

3.6. Calibration Math ......................................................................................................................................... 29

3.6.1. Correction Coefficients ......................................................................................................................... 29

3.6.2. Interpretation of Binary Numbers for Correction Coefficients .............................................................. 30

3.7. Reading EEPROM Contents ...................................................................................................................... 34

4 Application Circuit Examples ............................................................................................................................. 35

4.1. Three-Wire Rail-to-Rail Ratiometric Output ................................................................................................ 35

4.2. Absolute Analog Voltage Output ................................................................................................................ 36

4.3. Three-Wire Ratiometric Output with Over-Voltage Protection ................................................................... 36

4.4. Digital Output .............................................................................................................................................. 37

4.5. Output Short Protection .............................................................................................................................. 37

5 Default EEPROM Settings ................................................................................................................................ 38

6 Pin Configuration and Package ......................................................................................................................... 39

7 ESD/Latch-Up-Protection .................................................................................................................................. 40

8 Test.................................................................................................................................................................... 40

9 Quality and Reliability ........................................................................................................................................ 40

10 Customization .................................................................................................................................................... 40

11 Ordering Codes ................................................................................................................................................. 41

12 Related Documents ........................................................................................................................................... 41

13 Definitions of Acronyms ..................................................................................................................................... 41

14 Document Revision History ............................................................................................................................... 42

List of Figures

Figure 2.1

Figure 2.2

Figure 3.1

Figure 3.2

Figure 3.3

Figure 3.4

Figure 3.5

Figure 3.6

Figure 3.7

Figure 3.8

Figure 3.9

Figure 4.1

ZSC31010 Block Diagram ................................................................................................................... 11

DAC Output Timing for Highest Update Rate ...................................................................................... 15

General Working Mode ........................................................................................................................ 18

Manchester Duty Cycle ........................................................................................................................ 20

19-Bit Write Frame ............................................................................................................................... 20

Read Acknowledge .............................................................................................................................. 21

Digital Output (NOM) Bridge Readings ............................................................................................... 21

Digital Output (NOM) Bridge Readings with Temperature .................................................................. 22

Read EEPROM Contents .................................................................................................................... 22

Transmission of a Number of Data Packets ........................................................................................ 22

ZACwire™ Output Timing for Lower Update Rates............................................................................. 23

Rail-to-Rail Ratiometric Voltage Output ............................................................................................... 35

January 20, 2016

ZSC31010 Datasheet

Figure 4.2

Figure 4.3

Figure 6.1

Absolute Analog Voltage Output.......................................................................................................... 36

Ratiometric Output, Temperature Compensation via Internal Diode ................................................... 36

ZSC31010 Pin-Out Diagram ................................................................................................................ 39

List of Tables

Table 1.1

Table 1.2

Table 1.3

Table 1.4

Table 2.1

Table 2.2

Table 3.1

Table 3.2

Table 3.3

Table 3.4

Table 3.5

Table 3.6

Table 3.7

Table 3.8

Table 3.9

Table 3.10

Table 3.11

Table 3.12

Table 4.1

Table 5.1

Table 6.1

Table 6.2

ADC Resolution Characteristics for an Analog Gain of 6 ...................................................................... 9

ADC Resolution Characteristics for an Analog Gain of 12 .................................................................... 9

ADC Resolution Characteristics for an Analog Gain of 24 .................................................................. 10

ADC Resolution Characteristics for an Analog Gain of 48 .................................................................. 10

Order of Trim Codes ............................................................................................................................ 16

Oscillator Trimming .............................................................................................................................. 17

Pin Configuration and Latch-Up Conditions ........................................................................................ 19

Total Transmission Time for Different Update Rate Settings and Output Configuration ..................... 23

Special Measurement versus Update Rate ......................................................................................... 23

Command/Data Bytes Encoding.......................................................................................................... 24

Programming Details for Command 30

.............................................................................................. 25

ZSC31010 EEPROM Bits .................................................................................................................... 27

Correction Coefficients ........................................................................................................................ 29

Gain_B[13:0] Weightings ..................................................................................................................... 30

Offset_B Weightings ............................................................................................................................ 31

Gain_T Weightings .............................................................................................................................. 31

Offset_T Weightings ............................................................................................................................ 32

EEPROM Read Order ......................................................................................................................... 34

Resistor Values for Short Protection ................................................................................................... 37

Factory Settings for the ZSC31010 EEPROM ..................................................................................... 38

Storage and Soldering Conditions for the SOP-8 Package ................................................................. 39

ZSC31010 Pin Configuration ............................................................................................................... 39

January 20, 2016

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