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MCIMX6Y2DVM09AB

Description
Multifunction Peripheral
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size2MB,139 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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MCIMX6Y2DVM09AB Overview

Multifunction Peripheral

NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6ULLCEC
Rev. 1.3, 08/2018
i.MX 6ULL Applications
Processors for Consumer
Products
MCIMX6Y0DVM05AA
MCIMX6Y1DVM05AA
MCIMX6Y1DVK05AA
MCIMX6Y2DVM05AA
MCIMX6Y2DVM09AA
MCIMX6Y7DVM09AA
MCIMX6Y7DVK05AA
MCIMX6Y2DVK09AB
MCIMX6Y0DVM05AB
MCIMX6Y1DVM05AB
MCIMX6Y1DVK05AB
MCIMX6Y2DVM05AB
MCIMX6Y2DVM09AB
MCIMX6Y7DVM09AB
MCIMX6Y7DVK05AB
Package Information
Plastic Package
MAPBGA 14 x 14 mm, 0.8 mm pitch
MAPBGA 9 x 9 mm, 0.5 mm pitch
Ordering Information
See
Table 1 on page 3
1
i.MX 6ULL Introduction
The i.MX 6ULL processors represent NXP’s latest
achievement in integrated multimedia-focused products
offering high performance processing with a high degree
of functional integration, targeted towards the growing
market of connected devices.
The i.MX 6ULL is a high performance, ultra efficient
processor family with featuring NXP’s advanced
implementation of the single Arm Cortex®-A7 core,
which operates at speeds of up to 900 MHz. i.MX 6ULL
includes integrated power management module that
reduces the complexity of external power supply and
simplifies the power sequencing. Each processor in this
family provides various memory interfaces, including
LPDDR2, DDR3, DDR3L, Raw and Managed NAND
flash, NOR flash, eMMC, Quad SPI, and a wide range of
other interfaces for connecting peripherals, such as
WLAN, Bluetooth™, GPS, displays, and camera
sensors.
1. i.MX 6ULL Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 3
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 18
3.2. Recommended Connections for Unused Analog
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 21
4.2. Power Supplies Requirements and Restrictions . 31
4.3. Integrated LDO Voltage Regulator Parameters . . 32
4.4. PLL’s Electrical Characteristics . . . . . . . . . . . . . . 34
4.5. On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . 36
4.6. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 37
4.7. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 40
4.8. Output Buffer Impedance Parameters . . . . . . . . . 43
4.9. System Modules Timing . . . . . . . . . . . . . . . . . . . . 46
4.10. Multi-Mode DDR Controller (MMDC) . . . . . . . . . . 57
4.11. General-Purpose Media Interface (GPMI) Timing 58
4.12. External Peripheral Interface Parameters . . . . . . 66
4.13. A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5. Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 103
5.1. Boot Mode Configuration Pins . . . . . . . . . . . . . . 103
5.2. Boot Device Interface Allocation . . . . . . . . . . . . 104
6. Package Information and Contact Assignments . . . . . 111
6.1. 14 x 14 mm Package Information . . . . . . . . . . . . 111
6.2. 9 x 9 mm Package Information . . . . . . . . . . . . . . 124
7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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