NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6ULLCEC
Rev. 1.3, 08/2018
i.MX 6ULL Applications
Processors for Consumer
Products
MCIMX6Y0DVM05AA
MCIMX6Y1DVM05AA
MCIMX6Y1DVK05AA
MCIMX6Y2DVM05AA
MCIMX6Y2DVM09AA
MCIMX6Y7DVM09AA
MCIMX6Y7DVK05AA
MCIMX6Y2DVK09AB
MCIMX6Y0DVM05AB
MCIMX6Y1DVM05AB
MCIMX6Y1DVK05AB
MCIMX6Y2DVM05AB
MCIMX6Y2DVM09AB
MCIMX6Y7DVM09AB
MCIMX6Y7DVK05AB
Package Information
Plastic Package
MAPBGA 14 x 14 mm, 0.8 mm pitch
MAPBGA 9 x 9 mm, 0.5 mm pitch
Ordering Information
See
Table 1 on page 3
1
i.MX 6ULL Introduction
The i.MX 6ULL processors represent NXP’s latest
achievement in integrated multimedia-focused products
offering high performance processing with a high degree
of functional integration, targeted towards the growing
market of connected devices.
The i.MX 6ULL is a high performance, ultra efficient
processor family with featuring NXP’s advanced
implementation of the single Arm Cortex®-A7 core,
which operates at speeds of up to 900 MHz. i.MX 6ULL
includes integrated power management module that
reduces the complexity of external power supply and
simplifies the power sequencing. Each processor in this
family provides various memory interfaces, including
LPDDR2, DDR3, DDR3L, Raw and Managed NAND
flash, NOR flash, eMMC, Quad SPI, and a wide range of
other interfaces for connecting peripherals, such as
WLAN, Bluetooth™, GPS, displays, and camera
sensors.
1. i.MX 6ULL Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 3
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 18
3.2. Recommended Connections for Unused Analog
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 21
4.2. Power Supplies Requirements and Restrictions . 31
4.3. Integrated LDO Voltage Regulator Parameters . . 32
4.4. PLL’s Electrical Characteristics . . . . . . . . . . . . . . 34
4.5. On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . 36
4.6. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 37
4.7. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 40
4.8. Output Buffer Impedance Parameters . . . . . . . . . 43
4.9. System Modules Timing . . . . . . . . . . . . . . . . . . . . 46
4.10. Multi-Mode DDR Controller (MMDC) . . . . . . . . . . 57
4.11. General-Purpose Media Interface (GPMI) Timing 58
4.12. External Peripheral Interface Parameters . . . . . . 66
4.13. A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5. Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 103
5.1. Boot Mode Configuration Pins . . . . . . . . . . . . . . 103
5.2. Boot Device Interface Allocation . . . . . . . . . . . . 104
6. Package Information and Contact Assignments . . . . . 111
6.1. 14 x 14 mm Package Information . . . . . . . . . . . . 111
6.2. 9 x 9 mm Package Information . . . . . . . . . . . . . . 124
7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.
i.MX 6ULL Introduction
The i.MX 6ULL processors are specifically useful for applications such as:
• Telematics
• Audio playback
• Connected devices
• IoT Gateway
• Access control panels
• Human Machine Interfaces (HMI)
• Portable medical and health care
• IP phones
• Smart appliances
• eReaders
The features of the i.MX 6ULL processors include:
• Single-core Arm Cortex-A7—The single core A7 provides a cost-effective and power-efficient
solution.
• Multilevel memory system—The multilevel memory system of processor is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processor supports
many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR
Flash, NAND Flash (MLC and SLC), OneNAND™, Quad SPI, and managed NAND, including
eMMC up to rev 4.4/4.41/4.5.
• Smart speed technology—Power management implemented throughout the IC that enables
multimedia features and peripherals to consume minimum power in both active and various low
power modes.
• Dynamic voltage and frequency scaling—The power efficiency of devices by scaling the voltage
and frequency to optimize performance.
• Multimedia powerhouse—The multimedia performance of processor is enhanced by a multilevel
cache system, NEON™ MPE (Media Processor Engine) co-processor, a programmable smart
DMA (SDMA) controller, an asynchronous audio sample rate converter, an Electrophoretic
Display (EPD) controller, and a Pixel processing pipeline (PXP) to support 2D image processing,
including color-space conversion, scaling, alpha-blending, and rotation.
• 2x Ethernet interfaces—2x 10/100 Mbps Ethernet controllers.
• Human-machine interface—Each processor supports one digital parallel display interface.
• Interface flexibility—Each processor supports connections to a variety of interfaces: two
high-speed USB on-the-go with PHY, multiple expansion card ports (high-speed MMC/SDIO host
and other), two 12-bit ADC modules with up to 10 total input channels and two CAN ports.
• Advanced security—The processors deliver hardware-enabled security features that enable secure
e-commerce, digital rights management (DRM), information encryption, secure boot, AES-128
encryption, SHA-1, SHA-256 HW acceleration engine, and secure software downloads. The
security features are discussed in the
i.MX 6ULL Security Reference Manual
(IMX6ULLSRM).
i.MX 6ULL Applications Processors for Consumer Products, Rev. 1.3, 08/2018
2
NXP Semiconductors
i.MX 6ULL Introduction
•
Integrated power management—The processors integrate linear regulators and internally generate
voltage levels for different domains. This significantly simplifies system power management
structure.
For a comprehensive list of the i.MX 6ULL features, see
Section 1.2, Features"”.
1.1
Ordering Information
Table 1. Ordering Information
Part Number
Feature
Package
Junction
Temperature T
j
(C)
0 to +95
Table 1
provides examples of orderable part numbers covered by this data sheet.
MCIMX6Y0DVM05AA
MCIMX6Y0DVM05AB
Features supports:
14 x 14 mm, 0.8 pitch
• 528 MHz, commercial grade for general purpose MAPBGA
• No security
• No LCD/CSI
• No CAN
• Ethernet x1
• USB OTG x1
• ADC x1
• UART x4
• SAI x1
• No ESAI
• Timer x2
• PWM x4
• I2C x2
• SPI x2
Features supports:
14 x 14 mm, 0.8 pitch
• 528 MHz, commercial grade for general purpose MAPBGA
• Basic security
• No LCD/CSI
• CAN x1
• Ethernet x1
• USB OTG x2
• ADC x1
• UART x8
• SAI x3
• ESAI x1
• Timer x4
• PWM x8
• I2C x4
• SPI x4
MCIMX6Y1DVM05AA
MCIMX6Y1DVM05AB
0 to +95
i.MX 6ULL Applications Processors for Consumer Products, Rev. 1.3, 08/2018
NXP Semiconductors
3
i.MX 6ULL Introduction
Table 1. Ordering Information
Part Number
Feature
Package
Junction
Temperature T
j
(C)
0 to +95
MCIMX6Y2DVM05AA
MCIMX6Y2DVM05AB
Features supports:
14 x 14 mm, 0.8 pitch
• 528 MHz, commercial grade for general purpose MAPBGA
• Basic security
• With LCD/CSI
• CAN x2
• Ethernet x2
• USB OTG x2
• ADC x2
• UART x8
• SAI x3
• ESAI x1
• Timer x4
• PWM x8
• I2C x4
• SPI x4
Features supports:
9 x 9 mm, 0.5 pitch
• 528 MHz, commercial grade for general purpose MAPBGA
• Basic security
• No LCD/CSI
• CAN x1
• Ethernet x1
• USB OTG x2
• ADC x1
• UART x8
• SAI x3
• ESAI x1
• Timer x4
• PWM x8
• I2C x4
• SPI x4
Features supports:
9 x 9 mm, 0.5 pitch
• 528 MHz, commercial grade for general purpose MAPBGA
• Basic security
• With LCD/CSI
• EPDC
• No CAN
• Ethernet x1
• USB OTG x2
• ADC x2
• UART x4
• SAI x3
• ESAI x1
• Timer x4
• PWM x4
• I2C x4
• SPI x4
MCIMX6Y1DVK05AA
MCIMX6Y1DVK05AB
0 to +95
MCIMX6Y7DVK05AA
MCIMX6Y7DVK05AB
0 to +95
i.MX 6ULL Applications Processors for Consumer Products, Rev. 1.3, 08/2018
4
NXP Semiconductors
i.MX 6ULL Introduction
Table 1. Ordering Information
Part Number
Feature
Package
Junction
Temperature T
j
(C)
0 to +95
MCIMX6Y2DVK09AB
Features supports:
9 x 9 mm, 0.5 pitch
• 900 MHz, commercial grade for general purpose MAPBGA
• Basic security
• With LCD/CSI
• CAN x2
• Ethernet x2
• USB OTG x2
• ADC x2
• UART x8
• SAI x3
• ESAI x1
• Timer x4
• PWM x8
• I2C x4
• SPI x4
Features supports:
14 x 14mm, 0.8 pitch
• 900 MHz, commercial grade for general purpose MAPBGA
• Basic security
• With LCD/CSI
• CAN x2
• Ethernet x2
• USB OTG x2
• ADC x2
• UART x8
• SAI x3
• ESAI x1
• Timer x4
• PWM x8
• I2C x4
• SPI x4
Features supports:
14 x 14mm, 0.8 pitch
• 900 MHz, commercial grade for general purpose MAPBGA
• Basic security
• With LCD/CSI
• EPDC
• No CAN
• Ethernet x1
• USB OTG x2
• ADC x2
• UART x4
• SAI x3
• ESAI x1
• Timer x4
• PWM x4
• I2C x4
• SPI x4
MCIMX6Y2DVM09AB
MCIMX6Y2DVM09AB
0 to +95
MCIMX6Y7DVM09AA
MCIMX6Y7DVM09AB
0 to +95
Figure 1
describes the part number nomenclature so that the users can identify the characteristics of the
specific part number they have (for example, cores, frequency, temperature grade, fuse options, and silicon
i.MX 6ULL Applications Processors for Consumer Products, Rev. 1.3, 08/2018
NXP Semiconductors
5
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