F93 Series
Resin-Molded Chip, Standard Tantalum J-Lead
FEATURES
• Compliant to the RoHS2 directive 2011/65/EU
• SMD J-lead
APPLICATIONS
• Low power DC/DC
LEAD-FREE COMPATI-
BLE
COMPONENT
CASE DIMENSIONS:
millimeters (inches)
Code EIA Code EIA Metric
A
B
C
N
1206
1210
2312
2917
3216-18
3528-21
6032-27
7343-30
L
3.20 ± 0.20
(0.126 ± 0.008)
3.50 ± 0.20
(0.126 ± 0.008)
6.00 ± 0.20
(0.236 ± 0.008)
7.30 ± 0.20
(0.287 ± 0.008)
W
1
1.60 ± 0.20
(0.063 ± 0.008)
2.80 ± 0.20
(0.110 ± 0.008)
3.20 ± 0.20
(0.126 ± 0.008)
4.30 ± 0.20
(0.169 ± 0.008)
W
2
1.20 ± 0.10
(0.047 ± 0.004)
2.20 ± 0.10
(0.087 ± 0.004)
2.20 ± 0.10
(0.087 ± 0.004)
2.40 ± 0.10
(0.094 ± 0.004)
H
1.60 ± 0.20
(0.063 ± 0.008)
1.90 ± 0.20
(0.075 ± 0.008)
2.50 ± 0.20
(0.098 ± 0.008)
2.80 ± 0.20
(0.110 ±0.008)
S
0.80 ± 0.20
(0.031 ± 0.008)
0.80 ± 0.20
(0.031 ± 0.008)
1.30 ± 0.20
(0.051 ± 0.008)
1.30 ± 0.20
(0.051 ± 0.008)
A, B CASE
C, N CASE
MARKING
A CASE
Capacitance
Code
B CASE
Capacitance
(µF)
C CASE
Capacitance
(µF)
N CASE
Capacitance
(µF)
C 685
22
16V
Rated Voltage
(V)
20V
25V
35V
D
E
V
Rated Voltage
Code
4V
6.3V
10V
16V
G
J
A
C
Rated Voltage
(V)
47
16V
Rated Voltage
(V)
HOW TO ORDER
F93
1A
106
Type
Rated
Voltage
Capacitance
Code
pF code: 1st two digits
represent significant figures,
3rd digit represents multiplier
(number of zeros to follow)
M
Tolerance
K = ±10%
M = ±20%
A
Case
Size
See
table
above
Packaging
See Tape & Reel
Packaging Section
TECHNICAL SPECIFICATIONS
Category Temperature Range:
Rated Temperature:
Capacitance Tolerance:
Dissipation Factor:
ESR 100kHz:
Leakage Current:
-55 to +125°C
+85°C
±20%, ±10% at 120Hz
Refer to next page
Refer to next page
After 1 minute’s application of rated voltage, leakage current at 20°C
is not more than 0.01CV or 0.5μA, whichever is greater.
After 1 minute’s application of rated voltage, leakage current at 85°C
is not more than 0.1CV or 5μA, whichever is greater.
After 1 minute’s application of derated voltage, leakage current at 125°C
is not more than 0.125CV or 6.3μA, whichever is greater.
+15% Max. at +125°C
+10% Max. at +85°C
-10% Max. at -55°C
Capacitance Change By Temperature
30
100
16V
062718
F93 Series
Resin-Molded Chip, Standard Tantalum J-Lead
QUALIFICATION TABLE
TEST
Damp Heat
(Steady State)
Temperature Cycles
Resistance to
Soldering Heat
F93 series (Temperature range -55ºC to +125ºC)
Condition
At 40°C, 90 to 95% R.H., 500 hours (No voltage applied)
Capacitance Change ........... Refer to page 32 (*1)
Dissipation Factor ................ Initial specified value or less
Leakage Current .................. Initial specified value or less
-55°C / +125°C, 30 minutes each, 5 cycles
Capacitance Change ........... Refer to page 32 (*1)
Dissipation Factor ................ Initial specified value or less
Leakage Current .................. Initial specified value or less
10 seconds reflow at 260°C, 5 seconds immersion at 260°C.
Capacitance Change ........... Refer to page 32 (*1)
Dissipation Factor ................ Initial specified value or less
Leakage Current .................. Initial specified value or less
After application of surge voltage in series with a 33Ω resistor at the rate of 30 seconds ON, 30 seconds OFF,
for 1000 successive test cycles at 85ºC, capacitors shall meet the characteristic requirements in the table above.
Capacitance Change ........... Refer to page 32 (*1)
Dissipation Factor ................ Initial specified value or less
Leakage Current .................. Initial specified value or less
After 2000 hours’ application of rated voltage in series with a 3Ω resistor at 85°C, or derated voltage in series
with a 3Ω resistor at 125°C, capacitors shall meet the characteristic requirements in the table above.
Capacitance Change ........... Refer to page 32 (*1)
Dissipation Factor ................ Initial specified value or less
Leakage Current .................. Initial specified value or less
After applying the pressure load of 5N for 10±1 seconds horizontally to the center of capacitor side body
which has no electrode and has been soldered beforehand on a substrate, there shall be found neither
exfoliation nor its sign at the terminal electrode.
Keeping a capacitor surface-mounted on a substrate upside down and supporting the substrate at
both of the opposite bottom points 45mm apart from the center of capacitor, the pressure strength is
applied with a specified jig at the center of substrate so that the substrate may bend by 1mm as
illustrated. Then, there shall be found no remarkable abnormality on the capacitor terminals.
1% per 1000 hours at 85°C, VR with 0.1Ω/V series impedance,
60% confidence level.
Surge
Endurance
Shear Test
Terminal Strength
Failure Rate
We can supply the type of compliance to AEC-Q200. Please contact to your local AVX sales office when these series are being designed in your application.
062718
33
Electronics Design Contest
京公网安备 11010802033920号
EEWORLD
