NTD4804N, NVD4804N
Power MOSFET
30 V, 117 A, Single N−Channel, DPAK/IPAK
Features
•
•
•
•
•
Low R
DS(on)
to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
AEC Q101 Qualified − NVD4804N
These Devices are Pb−Free and are RoHS Compliant
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V
(BR)DSS
30 V
R
DS(on)
MAX
4.0 mW @ 10 V
5.5 mW @ 4.5 V
D
I
D
MAX
117 A
Applications
•
CPU Power Delivery
•
DC−DC Converters
•
Low Side Switching
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (R
qJA
) (Note 1)
Power Dissipation
(R
qJA
) (Note 1)
Continuous Drain
Current (R
qJA
) (Note 2)
Power Dissipation
(R
qJA
) (Note 2)
Continuous Drain
Current (R
qJC
)
(Note 1)
Power Dissipation
(R
qJC
) (Note 1)
Pulsed Drain Current
t
p
=10ms
Current Limited by Package
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
T
A
= 25°C
Steady
State
T
A
= 85°C
T
A
= 25°C
T
C
= 25°C
T
C
= 85°C
T
C
= 25°C
T
A
= 25°C
T
A
= 25°C
P
D
I
DM
I
DmaxPkg
T
J
, T
stg
I
S
dV/dt
E
AS
P
D
I
D
P
D
I
D
Symbol
V
DSS
V
GS
I
D
Value
30
"20
19.6
15.2
2.66
14.5
11
1.43
124
96
107
230
45
−55 to
175
78
6.0
450
W
A
A
°C
A
V/ns
mJ
4
Drain
AYWW
48
04NG
W
A
W
1 2
A
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
Unit
V
V
A
4
G
N−Channel
S
4
1
3
CASE 369AD
CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
AYWW
48
04NG
4
Drain
AYWW
48
04NG
Operating Junction and Storage Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (V
DD
= 24 V, V
GS
= 10 V,
L = 1.0 mH, I
L(pk)
= 30 A, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1 2 3
1 Drain 3
Gate Source Gate Drain Source 1 2 3
Gate Drain Source
A
= Assembly Location
Y
= Year
WW
= Work Week
4804N = Device Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2016
1
November, 2016 − Rev. 10
Publication Order Number:
NTD4804N/D
NTD4804N, NVD4804N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case (Drain)
Junction−to−TAB (Drain)
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − Steady State (Note 2)
1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
Symbol
R
qJC
R
qJC−TAB
R
qJA
R
qJA
Value
1.4
3.5
56.4
105
Unit
°C/W
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
V
GS
= 0 V,
V
DS
= 24 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
30
26
1.0
10
"100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
I
GSS
V
DS
= 0 V, V
GS
=
"20
V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= 250
mA
1.5
7.6
2.5
V
mV/°C
V
GS
= 10 to 11.5 V
I
D
= 30 A
I
D
= 15 A
3.4
3.4
4.7
4.6
23
4.0
mW
V
GS
= 4.5 V
I
D
= 30 A
I
D
= 15 A
5.5
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
SWITCHING CHARACTERISTICS
(Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
gFS
V
DS
= 15 V, I
D
= 15 A
S
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 11.5 V, V
DS
= 15 V,
I
D
= 30 A
V
GS
= 4.5 V, V
DS
= 15 V,
I
D
= 30 A
V
GS
= 0 V, f = 1.0 MHz,
V
DS
= 12 V
4490
952
556
30
5.5
13
13
73
40
pF
nC
nC
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 11.5 V, V
DS
= 15 V,
I
D
= 15 A, R
G
= 3.0
W
V
GS
= 4.5 V, V
DS
= 15 V,
I
D
= 15 A, R
G
= 3.0
W
18
20
24
8
10
19
35
5
ns
ns
3. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD4804N, NVD4804N
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Parameter
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 30 A
T
J
= 25°C
T
J
= 125°C
0.81
0.72
34
V
GS
= 0 V, dIs/dt = 100 A/ms,
I
S
= 30 A
19
15
30
nC
ns
1.2
V
Symbol
Test Condition
Min
Typ
Max
Unit
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Time
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance, DPAK
Drain Inductance, IPAK
Gate Inductance
Gate Resistance
t
RR
ta
tb
Q
RR
L
S
L
D
L
D
L
G
R
G
T
A
= 25°C
2.49
0.0164
1.88
3.46
0.6
nH
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NTD4804N, NVD4804N
TYPICAL PERFORMANCE CURVES
240
I
D
, DRAIN CURRENT (AMPS)
200
160
120
80
3.6 V
40
3.2 V
0
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
0
1
2
3
4V
240
T
J
= 25°C
I
D
, DRAIN CURRENT (AMPS)
4.5 V
200
160
120
80
40
V
DS
≥
10 V
10 V
6V
T
J
= 125°C
T
J
= 25°C
T
J
= −55°C
4
5
6
7
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
2
4
6
8
10
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I
D
= 30 A
T
J
= 25°C
0.01
T
J
= 25°C
0.0075
V
GS
= 4.5 V
0.005
V
GS
= 11.5 V
0.0025
0
10
20
30
40
50
60
70
80
90 100
I
D
, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50 −25
100
0
25
50
75
100
125
150
175
0
I
DSS
, LEAKAGE (nA)
10,000
I
D
= 30 A
V
GS
= 10 V
100,000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 175°C
1000
T
J
= 125°C
5
10
15
20
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
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NTD4804N, NVD4804N
TYPICAL PERFORMANCE CURVES
6000
C
iss
5000
C, CAPACITANCE (pF)
4000
3000
2000
1000
0
15
V
DS
= 0 V
10
V
GS
= 0 V
10
15
20
C
rss
T
J
= 25°C
5
Q
T
4
Q
1
Q
2
C
iss
VGS , GATE−TO−SOURCE VOLTAGE (VOLTS)
3
2
C
oss
C
rss
25
30
1
0
0
5
I
D
= 30 A
T
J
= 25°C
15
20
25
10
Q
G
, TOTAL GATE CHARGE (nC)
30
5
5
0
V
GS
V
DS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
IS, SOURCE CURRENT (AMPS)
V
DD
= 15 V
I
D
= 30 A
V
GS
= 11.5 V
t, TIME (ns)
100
t
r
t
d(off)
t
f
10
t
d(on)
30
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
V
GS
= 0 V
25
20
15
10
5
0
0
T
J
= 25°C
1
1
10
R
G
, GATE RESISTANCE (OHMS)
100
0.2
0.4
0.6
0.8
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
1000
I D, DRAIN CURRENT (AMPS)
500
Figure 10. Diode Forward Voltage vs. Current
I
D
= 30 A
400
10
ms
100
100
ms
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
0.1
10
1
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
1 ms
300
10
200
10 ms
dc
100
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (°C)
175
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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