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17S100LVI

Description
SPECIALTY MEMORY CIRCUIT, PDIP8
Categorystorage   
File Size77KB,9 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Download Datasheet Parametric View All

17S100LVI Overview

SPECIALTY MEMORY CIRCUIT, PDIP8

17S100LVI Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals8
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.25 V
Minimum supply/operating voltage4.75 V
Rated supply voltage5 V
Processing package descriptionPlastic, DIP-8
stateACTIVE
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeIN-line
Terminal formTHROUGH-hole
Terminal spacing2.54 mm
terminal coatingtin lead
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelCOMMERCIAL
memory width1
organize53984 × 1
storage density53984 deg
operating modeSynchronize
Number of digits53984 words
Number of digits53984
Memory IC typememory circuit
0
R
Spartan Family of One-Time
Programmable Configuration
PROMs (XC17S00)
5
DS030 (v1.8) October 10, 2001
0
Product Specification
Introduction
The Spartan
family of PROMs provides an easy-to-use,
cost-effective method for storing Spartan device configura-
tion bitstreams.
When the Spartan device is in Master Serial mode, it gener-
ates a configuration clock that drives the Spartan PROM. A
short access time after the rising clock edge, data appears
on the PROM DATA output pin that is connected to the Spar-
tan device D
IN
pin. The Spartan device generates the
appropriate number of clock pulses to complete the config-
uration. Once configured, it disables the PROM. When a
Spartan device is in Slave Serial mode, the PROM and the
Spartan device must both be clocked by an incoming signal.
For device programming, either the Xilinx Alliance or the
Foundation series development systems compiles the Spar-
tan device design file into a standard HEX format which is
then transferred to most commercial PROM programmers.
Spartan PROM Features
Configuration one-time programmable (OTP) read-only
memory designed to store configuration bitstreams for
Spartan, Spartan-XL, and Spartan-II FPGA devices
Simple interface to the Spartan device requires only
one user I/O pin
Programmable reset polarity (active High or active
Low)
Low-power CMOS floating gate process
Available in 5V and 3.3V versions
Available in compact plastic 8-pin DIP, 8-pin VOIC, or
20-pin SOIC packages.
Programming support by leading programmer
manufacturers.
Design support using the Xilinx Alliance and
Foundation series software packages.
Guaranteed 20 year life data retention
Spartan FPGA
XCS05
XCS05XL
XCS10
XCS10XL
XCS20
XCS20XL
XCS30
XCS30XL
XCS40
XCS40XL
XC2S50
XC2S100
XC2S150
Configuration Bits
53,984
54,544
95,008
95,752
178,144
179,160
247,968
249,168
329,312
330,696
559,232
781,248
1,040,128
Compatible Spartan PROM
XC17S05
XC17S05XL
XC17S10
XC17S10XL
XC17S20
XC17S20XL
XC17S30
XC17S30XL
XC17S40
XC17S40XL
XC17S50XL
XC17S100XL
XC17S150XL
© 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS030 (v1.8) October 10, 2001
Product Specification
www.xilinx.com
1-800-255-7778
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